staging: comedi: addi_apci_1564: use dev->iobase for main registers (4484a239) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/staging/comedi/drivers/addi-data/hwdrv_apci1564.c

+18 −18

Original line number	Original line	Diff line number	Diff line
	@@ -18,7 +18,7 @@
	#define ADDIDATA_WATCHDOG 2		#define ADDIDATA_WATCHDOG 2

	/*		/*
	* devpriv->amcc_iobase Register Map		* dev->iobase Register Map
	*/		*/
	#define APCI1564_DI_REG 0x04		#define APCI1564_DI_REG 0x04
	#define APCI1564_DI_INT_MODE1_REG 0x08		#define APCI1564_DI_INT_MODE1_REG 0x08
	@@ -81,18 +81,18 @@ static int apci1564_timer_config(struct comedi_device *dev,
	devpriv->tsk_current = current;		devpriv->tsk_current = current;
	if (data[0] == ADDIDATA_TIMER) {		if (data[0] == ADDIDATA_TIMER) {
	/* First Stop The Timer */		/* First Stop The Timer */
	ul_Command1 = inl(devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		ul_Command1 = inl(dev->iobase + APCI1564_TIMER_CTRL_REG);
	ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;		ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;
	/* Stop The Timer */		/* Stop The Timer */
	outl(ul_Command1, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(ul_Command1, dev->iobase + APCI1564_TIMER_CTRL_REG);

	devpriv->timer_select_mode = ADDIDATA_TIMER;		devpriv->timer_select_mode = ADDIDATA_TIMER;
	if (data[1] == 1) {		if (data[1] == 1) {
	/* Enable TIMER int & DISABLE ALL THE OTHER int SOURCES */		/* Enable TIMER int & DISABLE ALL THE OTHER int SOURCES */
	outl(0x02, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(0x02, dev->iobase + APCI1564_TIMER_CTRL_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DO_IRQ_REG);		outl(0x0, dev->iobase + APCI1564_DO_IRQ_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_WDOG_IRQ_REG);		outl(0x0, dev->iobase + APCI1564_WDOG_IRQ_REG);
	outl(0x0,		outl(0x0,
	devpriv->counters + APCI1564_COUNTER_IRQ_REG(0));		devpriv->counters + APCI1564_COUNTER_IRQ_REG(0));
	outl(0x0,		outl(0x0,
	@@ -101,19 +101,19 @@ static int apci1564_timer_config(struct comedi_device *dev,
	devpriv->counters + APCI1564_COUNTER_IRQ_REG(2));		devpriv->counters + APCI1564_COUNTER_IRQ_REG(2));
	} else {		} else {
	/* disable Timer interrupt */		/* disable Timer interrupt */
	outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(0x0, dev->iobase + APCI1564_TIMER_CTRL_REG);
	}		}

	/* Loading Timebase */		/* Loading Timebase */
	outl(data[2], devpriv->amcc_iobase + APCI1564_TIMER_TIMEBASE_REG);		outl(data[2], dev->iobase + APCI1564_TIMER_TIMEBASE_REG);

	/* Loading the Reload value */		/* Loading the Reload value */
	outl(data[3], devpriv->amcc_iobase + APCI1564_TIMER_RELOAD_REG);		outl(data[3], dev->iobase + APCI1564_TIMER_RELOAD_REG);

	ul_Command1 = inl(devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		ul_Command1 = inl(dev->iobase + APCI1564_TIMER_CTRL_REG);
	ul_Command1 = (ul_Command1 & 0xFFF719E2UL) \| 2UL << 13UL \| 0x10UL;		ul_Command1 = (ul_Command1 & 0xFFF719E2UL) \| 2UL << 13UL \| 0x10UL;
	/* mode 2 */		/* mode 2 */
	outl(ul_Command1, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(ul_Command1, dev->iobase + APCI1564_TIMER_CTRL_REG);
	} else if (data[0] == ADDIDATA_COUNTER) {		} else if (data[0] == ADDIDATA_COUNTER) {
	devpriv->timer_select_mode = ADDIDATA_COUNTER;		devpriv->timer_select_mode = ADDIDATA_COUNTER;

	@@ -175,17 +175,17 @@ static int apci1564_timer_write(struct comedi_device *dev,

	if (devpriv->timer_select_mode == ADDIDATA_TIMER) {		if (devpriv->timer_select_mode == ADDIDATA_TIMER) {
	if (data[1] == 1) {		if (data[1] == 1) {
	ul_Command1 = inl(devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		ul_Command1 = inl(dev->iobase + APCI1564_TIMER_CTRL_REG);
	ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) \| 0x1UL;		ul_Command1 = (ul_Command1 & 0xFFFFF9FFUL) \| 0x1UL;

	/* Enable the Timer */		/* Enable the Timer */
	outl(ul_Command1, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(ul_Command1, dev->iobase + APCI1564_TIMER_CTRL_REG);
	} else if (data[1] == 0) {		} else if (data[1] == 0) {
	/* Stop The Timer */		/* Stop The Timer */

	ul_Command1 = inl(devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		ul_Command1 = inl(dev->iobase + APCI1564_TIMER_CTRL_REG);
	ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;		ul_Command1 = ul_Command1 & 0xFFFFF9FEUL;
	outl(ul_Command1, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(ul_Command1, dev->iobase + APCI1564_TIMER_CTRL_REG);
	}		}
	} else if (devpriv->timer_select_mode == ADDIDATA_COUNTER) {		} else if (devpriv->timer_select_mode == ADDIDATA_COUNTER) {
	ul_Command1 = inl(devpriv->counters +		ul_Command1 = inl(devpriv->counters +
	@@ -223,10 +223,10 @@ static int apci1564_timer_read(struct comedi_device *dev,

	if (devpriv->timer_select_mode == ADDIDATA_TIMER) {		if (devpriv->timer_select_mode == ADDIDATA_TIMER) {
	/* Stores the status of the Timer */		/* Stores the status of the Timer */
	data[0] = inl(devpriv->amcc_iobase + APCI1564_TIMER_STATUS_REG) & 0x1;		data[0] = inl(dev->iobase + APCI1564_TIMER_STATUS_REG) & 0x1;

	/* Stores the Actual value of the Timer */		/* Stores the Actual value of the Timer */
	data[1] = inl(devpriv->amcc_iobase + APCI1564_TIMER_REG);		data[1] = inl(dev->iobase + APCI1564_TIMER_REG);
	} else if (devpriv->timer_select_mode == ADDIDATA_COUNTER) {		} else if (devpriv->timer_select_mode == ADDIDATA_COUNTER) {
	/* Read the Counter Actual Value. */		/* Read the Counter Actual Value. */
	data[0] = inl(devpriv->counters +		data[0] = inl(devpriv->counters +

drivers/staging/comedi/drivers/addi_apci_1564.c

+35 −44

Original line number	Original line	Diff line number	Diff line
	@@ -32,7 +32,6 @@

	struct apci1564_private {		struct apci1564_private {
	unsigned long counters; /* base address of 32-bit counters */		unsigned long counters; /* base address of 32-bit counters */
	unsigned int amcc_iobase; /* base of AMCC I/O registers */
	unsigned int mode1; /* riding-edge/high level channels */		unsigned int mode1; /* riding-edge/high level channels */
	unsigned int mode2; /* falling-edge/low level channels */		unsigned int mode2; /* falling-edge/low level channels */
	unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */		unsigned int ctrl; /* interrupt mode OR (edge) . AND (level) */
	@@ -47,21 +46,21 @@ static int apci1564_reset(struct comedi_device *dev)
	struct apci1564_private *devpriv = dev->private;		struct apci1564_private *devpriv = dev->private;

	/* Disable the input interrupts and reset status register */		/* Disable the input interrupts and reset status register */
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
	inl(devpriv->amcc_iobase + APCI1564_DI_INT_STATUS_REG);		inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);		outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);		outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG);

	/* Reset the output channels and disable interrupts */		/* Reset the output channels and disable interrupts */
	outl(0x0, devpriv->amcc_iobase + APCI1564_DO_REG);		outl(0x0, dev->iobase + APCI1564_DO_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DO_INT_CTRL_REG);		outl(0x0, dev->iobase + APCI1564_DO_INT_CTRL_REG);

	/* Reset the watchdog registers */		/* Reset the watchdog registers */
	addi_watchdog_reset(devpriv->amcc_iobase + APCI1564_WDOG_REG);		addi_watchdog_reset(dev->iobase + APCI1564_WDOG_REG);

	/* Reset the timer registers */		/* Reset the timer registers */
	outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(0x0, dev->iobase + APCI1564_TIMER_CTRL_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_RELOAD_REG);		outl(0x0, dev->iobase + APCI1564_TIMER_RELOAD_REG);

	/* Reset the counter registers */		/* Reset the counter registers */
	outl(0x0, devpriv->counters + APCI1564_COUNTER_CTRL_REG(0));		outl(0x0, devpriv->counters + APCI1564_COUNTER_CTRL_REG(0));
	@@ -80,32 +79,32 @@ static irqreturn_t apci1564_interrupt(int irq, void *d)
	unsigned int ctrl;		unsigned int ctrl;
	unsigned int chan;		unsigned int chan;

	status = inl(devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		status = inl(dev->iobase + APCI1564_DI_IRQ_REG);
	if (status & APCI1564_DI_INT_ENABLE) {		if (status & APCI1564_DI_INT_ENABLE) {
	/* disable the interrupt */		/* disable the interrupt */
	outl(status & APCI1564_DI_INT_DISABLE,		outl(status & APCI1564_DI_INT_DISABLE,
	devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		dev->iobase + APCI1564_DI_IRQ_REG);

	s->state = inl(devpriv->amcc_iobase +		s->state = inl(dev->iobase + APCI1564_DI_INT_STATUS_REG) &
	APCI1564_DI_INT_STATUS_REG) & 0xffff;		0xffff;
	comedi_buf_write_samples(s, &s->state, 1);		comedi_buf_write_samples(s, &s->state, 1);
	comedi_handle_events(dev, s);		comedi_handle_events(dev, s);

	/* enable the interrupt */		/* enable the interrupt */
	outl(status, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		outl(status, dev->iobase + APCI1564_DI_IRQ_REG);
	}		}

	status = inl(devpriv->amcc_iobase + APCI1564_TIMER_IRQ_REG);		status = inl(dev->iobase + APCI1564_TIMER_IRQ_REG);
	if (status & 0x01) {		if (status & 0x01) {
	/* Disable Timer Interrupt */		/* Disable Timer Interrupt */
	ctrl = inl(devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		ctrl = inl(dev->iobase + APCI1564_TIMER_CTRL_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(0x0, dev->iobase + APCI1564_TIMER_CTRL_REG);

	/* Send a signal to from kernel to user space */		/* Send a signal to from kernel to user space */
	send_sig(SIGIO, devpriv->tsk_current, 0);		send_sig(SIGIO, devpriv->tsk_current, 0);

	/* Enable Timer Interrupt */		/* Enable Timer Interrupt */
	outl(ctrl, devpriv->amcc_iobase + APCI1564_TIMER_CTRL_REG);		outl(ctrl, dev->iobase + APCI1564_TIMER_CTRL_REG);
	}		}

	for (chan = 0; chan < 4; chan++) {		for (chan = 0; chan < 4; chan++) {
	@@ -135,9 +134,7 @@ static int apci1564_di_insn_bits(struct comedi_device *dev,
	struct comedi_insn *insn,		struct comedi_insn *insn,
	unsigned int *data)		unsigned int *data)
	{		{
	struct apci1564_private *devpriv = dev->private;		data[1] = inl(dev->iobase + APCI1564_DI_REG);

	data[1] = inl(devpriv->amcc_iobase + APCI1564_DI_REG);

	return insn->n;		return insn->n;
	}		}
	@@ -147,12 +144,10 @@ static int apci1564_do_insn_bits(struct comedi_device *dev,
	struct comedi_insn *insn,		struct comedi_insn *insn,
	unsigned int *data)		unsigned int *data)
	{		{
	struct apci1564_private *devpriv = dev->private;		s->state = inl(dev->iobase + APCI1564_DO_REG);

	s->state = inl(devpriv->amcc_iobase + APCI1564_DO_REG);

	if (comedi_dio_update_state(s, data))		if (comedi_dio_update_state(s, data))
	outl(s->state, devpriv->amcc_iobase + APCI1564_DO_REG);		outl(s->state, dev->iobase + APCI1564_DO_REG);

	data[1] = s->state;		data[1] = s->state;

	@@ -164,9 +159,7 @@ static int apci1564_diag_insn_bits(struct comedi_device *dev,
	struct comedi_insn *insn,		struct comedi_insn *insn,
	unsigned int *data)		unsigned int *data)
	{		{
	struct apci1564_private *devpriv = dev->private;		data[1] = inl(dev->iobase + APCI1564_DO_INT_STATUS_REG) & 3;

	data[1] = inl(devpriv->amcc_iobase + APCI1564_DO_INT_STATUS_REG) & 3;

	return insn->n;		return insn->n;
	}		}
	@@ -220,10 +213,10 @@ static int apci1564_cos_insn_config(struct comedi_device *dev,
	devpriv->ctrl = 0;		devpriv->ctrl = 0;
	devpriv->mode1 = 0;		devpriv->mode1 = 0;
	devpriv->mode2 = 0;		devpriv->mode2 = 0;
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
	inl(devpriv->amcc_iobase + APCI1564_DI_INT_STATUS_REG);		inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);		outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);		outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG);
	break;		break;
	case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:		case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
	if (devpriv->ctrl != (APCI1564_DI_INT_ENABLE \|		if (devpriv->ctrl != (APCI1564_DI_INT_ENABLE \|
	@@ -335,9 +328,9 @@ static int apci1564_cos_cmd(struct comedi_device *dev,
	return -EINVAL;		return -EINVAL;
	}		}

	outl(devpriv->mode1, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);		outl(devpriv->mode1, dev->iobase + APCI1564_DI_INT_MODE1_REG);
	outl(devpriv->mode2, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);		outl(devpriv->mode2, dev->iobase + APCI1564_DI_INT_MODE2_REG);
	outl(devpriv->ctrl, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		outl(devpriv->ctrl, dev->iobase + APCI1564_DI_IRQ_REG);

	return 0;		return 0;
	}		}
	@@ -345,12 +338,10 @@ static int apci1564_cos_cmd(struct comedi_device *dev,
	static int apci1564_cos_cancel(struct comedi_device *dev,		static int apci1564_cos_cancel(struct comedi_device *dev,
	struct comedi_subdevice *s)		struct comedi_subdevice *s)
	{		{
	struct apci1564_private *devpriv = dev->private;		outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG);
			inl(dev->iobase + APCI1564_DI_INT_STATUS_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_IRQ_REG);		outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG);
	inl(devpriv->amcc_iobase + APCI1564_DI_INT_STATUS_REG);		outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE1_REG);
	outl(0x0, devpriv->amcc_iobase + APCI1564_DI_INT_MODE2_REG);

	return 0;		return 0;
	}		}
	@@ -372,7 +363,7 @@ static int apci1564_auto_attach(struct comedi_device *dev,
	return ret;		return ret;

	/* PLD Revision 2.x I/O Mapping */		/* PLD Revision 2.x I/O Mapping */
	devpriv->amcc_iobase = pci_resource_start(pcidev, 0);		dev->iobase = pci_resource_start(pcidev, 0);
	devpriv->counters = pci_resource_start(pcidev, 1);		devpriv->counters = pci_resource_start(pcidev, 1);

	apci1564_reset(dev);		apci1564_reset(dev);
	@@ -438,7 +429,7 @@ static int apci1564_auto_attach(struct comedi_device *dev,

	/* Initialize the watchdog subdevice */		/* Initialize the watchdog subdevice */
	s = &dev->subdevices[4];		s = &dev->subdevices[4];
	ret = addi_watchdog_init(s, devpriv->amcc_iobase + APCI1564_WDOG_REG);		ret = addi_watchdog_init(s, dev->iobase + APCI1564_WDOG_REG);
	if (ret)		if (ret)
	return ret;		return ret;