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Commit 438236e7 authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Mauro Carvalho Chehab
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[media] exynos4-is: Add support for all required clocks



This patch adds 3 more clocks to Exynos4 ISP driver. Enabling them is
needed to make the hardware operational. Till now it worked only because
those clocks were registered with IGNORE_UNUSED flag and were enabled
by default after SoC reset.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Acked-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
parent 6e7122a3
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+4 −3
Original line number Original line Diff line number Diff line
@@ -16,9 +16,10 @@ Required properties:
- clocks	: list of clock specifiers, corresponding to entries in
- clocks	: list of clock specifiers, corresponding to entries in
		  clock-names property;
		  clock-names property;
- clock-names	: must contain "ppmuispx", "ppmuispx", "lite0", "lite1"
- clock-names	: must contain "ppmuispx", "ppmuispx", "lite0", "lite1"
		  "mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "uart",
		  "mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "gicisp",
		  "ispdiv0", "ispdiv1", "mcuispdiv0", "mcuispdiv1", "aclk200",
		  "pwm_isp", "mcuctl_isp", "uart", "ispdiv0", "ispdiv1",
		  "div_aclk200", "aclk400mcuisp", "div_aclk400mcuisp" entries,
		  "mcuispdiv0", "mcuispdiv1", "aclk200", "div_aclk200",
		  "aclk400mcuisp", "div_aclk400mcuisp" entries,
		  matching entries in the clocks property.
		  matching entries in the clocks property.
pmu subnode
pmu subnode
-----------
-----------
+3 −0
Original line number Original line Diff line number Diff line
@@ -52,6 +52,9 @@ static char *fimc_is_clocks[ISS_CLKS_MAX] = {
	[ISS_CLK_DRC]			= "drc",
	[ISS_CLK_DRC]			= "drc",
	[ISS_CLK_FD]			= "fd",
	[ISS_CLK_FD]			= "fd",
	[ISS_CLK_MCUISP]		= "mcuisp",
	[ISS_CLK_MCUISP]		= "mcuisp",
	[ISS_CLK_GICISP]		= "gicisp",
	[ISS_CLK_PWM_ISP]		= "pwm_isp",
	[ISS_CLK_MCUCTL_ISP]		= "mcuctl_isp",
	[ISS_CLK_UART]			= "uart",
	[ISS_CLK_UART]			= "uart",
	[ISS_CLK_ISP_DIV0]		= "ispdiv0",
	[ISS_CLK_ISP_DIV0]		= "ispdiv0",
	[ISS_CLK_ISP_DIV1]		= "ispdiv1",
	[ISS_CLK_ISP_DIV1]		= "ispdiv1",
+3 −0
Original line number Original line Diff line number Diff line
@@ -77,6 +77,9 @@ enum {
	ISS_CLK_DRC,
	ISS_CLK_DRC,
	ISS_CLK_FD,
	ISS_CLK_FD,
	ISS_CLK_MCUISP,
	ISS_CLK_MCUISP,
	ISS_CLK_GICISP,
	ISS_CLK_PWM_ISP,
	ISS_CLK_MCUCTL_ISP,
	ISS_CLK_UART,
	ISS_CLK_UART,
	ISS_GATE_CLKS_MAX,
	ISS_GATE_CLKS_MAX,
	ISS_CLK_ISP_DIV0 = ISS_GATE_CLKS_MAX,
	ISS_CLK_ISP_DIV0 = ISS_GATE_CLKS_MAX,