Merge "msm: camera: isp: Adds stats DMI and cfg dump info" into camera-kernel.lnx.1.0 (435f1dc0) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe170_150.h

+163 −0

Original line number	Diff line number	Diff line
		@@ -105,6 +105,169 @@ struct cam_vfe_top_ver2_reg_offset_module_ctrl zoom_170_150_reg = {
		.enable = 0x0000004C,
		};

		/Check offsets and values/
		static struct cam_vfe_bus_ver2_stats_cfg_info stats_170_150_info = {
		.dmi_offset_info = {
		.auto_increment = 0x00000100,
		.cfg_offset = 0x00000C24,
		.addr_offset = 0x00000C28,
		.data_hi_offset = 0x00000C2C,
		.data_lo_offset = 0x00000C30,
		},
		.stats_cfg_offset = {
		/* CAM_VFE_BUS_VER2_VFE_OUT_RDI0 */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_RDI1 */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_RDI2 */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_RDI3 */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_FULL */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_DS4 */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_DS16 */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_RAW_DUMP */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_FD */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_PDAF */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BE */
		{
		.res_index = CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BE,
		.cfg_offset = 0x00000AB8,
		.num_cfg = 0x00000ABC,
		.cfg_size = 0x00000AC0,
		.is_lut = 0,
		.lut = {
		.size = -1,
		.bank_0 = -1,
		.bank_1 = -1,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST */
		{
		.res_index =
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST,
		.cfg_offset = 0x00000AD4,
		.num_cfg = 0x00000AD8,
		.cfg_size = 0x00000000,
		.is_lut = 1,
		.lut = {
		.size = 180,
		.bank_0 = 0x36,
		.bank_1 = 0x37,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_TL_BG */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_BF */
		{
		.res_index = CAM_VFE_BUS_VER2_VFE_OUT_STATS_BF,
		.cfg_offset = 0x00000AE4,
		.num_cfg = 0x00000000,
		.cfg_size = 0x00000000,
		.is_lut = 1,
		.lut = {
		.size = 180,
		.bank_0 = 0x40,
		.bank_1 = 0x41,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_AWB_BG */
		{
		.res_index = CAM_VFE_BUS_VER2_VFE_OUT_STATS_AWB_BG,
		.cfg_offset = 0x00000BC8,
		.num_cfg = 0x00000BCC,
		.cfg_size = 0x00000BD0,
		.is_lut = 0,
		.lut = {
		.size = -1,
		.bank_0 = -1,
		.bank_1 = -1,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST */
		{
		.res_index = CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST,
		.cfg_offset = 0x00000BE4,
		.num_cfg = 0x00000BE8,
		.cfg_size = 0x00000000,
		.is_lut = 1,
		.lut = {
		.size = 180,
		.bank_0 = 0x3A,
		.bank_1 = -1,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_RS */
		{
		.res_index = CAM_VFE_BUS_VER2_VFE_OUT_STATS_RS,
		.cfg_offset = 0x00000BEC,
		.num_cfg = 0x00000BF0,
		.cfg_size = 0x00000BF4,
		.is_lut = 0,
		.lut = {
		.size = -1,
		.bank_0 = -1,
		.bank_1 = -1,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_CS */
		{
		.res_index = CAM_VFE_BUS_VER2_VFE_OUT_STATS_CS,
		.cfg_offset = 0x00000BF8,
		.num_cfg = 0x00000BFC,
		.cfg_size = 0x00000C00,
		.is_lut = 0,
		.lut = {
		.size = -1,
		.bank_0 = -1,
		.bank_1 = -1,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_STATS_IHIST */
		{
		.res_index = CAM_VFE_BUS_VER2_VFE_OUT_STATS_IHIST,
		.cfg_offset = 0x00000C04,
		.num_cfg = 0x00000C08,
		.cfg_size = 0x00000000,
		.is_lut = 1,
		.lut = {
		.size = 180,
		.bank_0 = 0x3B,
		.bank_1 = 0x3C,
		},
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_FULL_DISP */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_DS4_DISP */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_DS16_DISP */
		{
		},
		/* CAM_VFE_BUS_VER2_VFE_OUT_2PD */
		{
		},
		},
		};

		static struct cam_vfe_top_ver2_reg_offset_common vfe170_150_top_common_reg = {
		.hw_version = 0x00000000,
		.hw_capability = 0x00000004,

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver2.c

+162 −117

Original line number	Diff line number	Diff line
		@@ -1411,8 +1411,8 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,
		struct cam_vfe_bus_ver2_priv *bus_priv = handler_priv;
		struct cam_vfe_bus_ver2_common_data *common_data;
		struct cam_isp_hw_event_info evt_info;
		struct cam_vfe_bus_ver2_stats_cfg_offset *stats_cfg;
		struct cam_vfe_bus_ver2_dmi_offset_common dmi_cfg;
		struct cam_vfe_bus_ver2_stats_cfg_offset *stats_cfg = NULL;
		struct cam_vfe_bus_ver2_dmi_offset_common dmi_cfg = {0};
		uint32_t val = 0;

		if (!handler_priv \|\| !evt_payload_priv)
		@@ -1421,8 +1421,13 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,
		evt_payload = evt_payload_priv;
		common_data = &bus_priv->common_data;

		if (common_data && common_data->stats_data) {
		stats_cfg = common_data->stats_data->stats_cfg_offset;
		dmi_cfg = common_data->stats_data->dmi_offset_info;
		} else {
		CAM_INFO(CAM_ISP, "Stats debug dump cfg not available");
		}

		val = evt_payload->debug_status_0;
		CAM_ERR(CAM_ISP, "Bus Violation: debug_status_0 = 0x%x", val);

		@@ -1458,6 +1463,7 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,

		if (val & 0x0400) {
		CAM_INFO(CAM_ISP, "PDAF violation");
		if (stats_cfg) {
		cam_vfe_bus_dump_dmi_reg(common_data->mem_base,
		CAM_VFE_BUS_LUT_WORD_SIZE_64,
		stats_cfg[
		@@ -1471,46 +1477,61 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_PDAF].cfg_offset));
		}
		}

		if (val & 0x0800) {
		CAM_INFO(CAM_ISP, "STATs HDR BE vltn RGN offset cfg 0x%08x",
		CAM_INFO(CAM_ISP, "STATs HDR BE violation");
		if (stats_cfg) {
		CAM_INFO(CAM_ISP,
		"STATs HDR BE vltn RGN offset cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BE].cfg_offset));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BE].
		cfg_offset));

		CAM_INFO(CAM_ISP, "RGN num cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BE].num_cfg));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BE].
		num_cfg));
		}
		}

		if (val & 0x01000) {
		CAM_INFO(CAM_ISP, "STATs HDR BHIST violation");
		if (stats_cfg) {
		cam_vfe_bus_dump_dmi_reg(common_data->mem_base,
		CAM_VFE_BUS_LUT_WORD_SIZE_64,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].lut.size,
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].
		lut.size,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].lut.bank_0,
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].
		lut.bank_0,
		dmi_cfg);

		cam_vfe_bus_dump_dmi_reg(common_data->mem_base,
		CAM_VFE_BUS_LUT_WORD_SIZE_64,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].lut.size,
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].
		lut.size,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].lut.bank_1,
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].
		lut.bank_1,
		dmi_cfg);

		CAM_INFO(CAM_ISP, "RGN offset cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].cfg_offset));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].
		cfg_offset));

		CAM_INFO(CAM_ISP, "RGN num cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].num_cfg));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_HDR_BHIST].
		num_cfg));
		}
		}

		if (val & 0x02000)
		@@ -1518,6 +1539,7 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,

		if (val & 0x04000) {
		CAM_INFO(CAM_ISP, "STATs BF violation");
		if (stats_cfg) {
		cam_vfe_bus_dump_dmi_reg(common_data->mem_base,
		CAM_VFE_BUS_LUT_WORD_SIZE_64,
		stats_cfg[
		@@ -1539,42 +1561,55 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_BF].cfg_offset));
		}
		}

		if (val & 0x08000) {
		CAM_INFO(CAM_ISP, "STATs AWB BG UBWC vltn RGN ofst cfg 0x%08x",
		CAM_INFO(CAM_ISP, "STATs AWB BG UBWC violation");
		if (stats_cfg) {
		CAM_INFO(CAM_ISP,
		"STATs AWB BG UBWC vltn RGN ofst cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_AWB_BG].cfg_offset));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_AWB_BG].
		cfg_offset));

		CAM_INFO(CAM_ISP, "RGN num cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_AWB_BG].num_cfg));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_AWB_BG].
		num_cfg));
		}
		}

		if (val & 0x010000) {
		CAM_INFO(CAM_ISP, "STATs BHIST violation");
		if (stats_cfg) {
		cam_vfe_bus_dump_dmi_reg(common_data->mem_base,
		CAM_VFE_BUS_LUT_WORD_SIZE_64,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST].lut.size,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST].lut.bank_0,
		dmi_cfg);
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST].
		lut.bank_0, dmi_cfg);

		CAM_INFO(CAM_ISP, "RGN offset cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST].cfg_offset));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST].
		cfg_offset));

		CAM_INFO(CAM_ISP, "RGN num cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_BHIST].num_cfg));
		}
		}

		if (val & 0x020000) {
		CAM_INFO(CAM_ISP, "STATs RS violation RGN offset cfg 0x%08x",
		CAM_INFO(CAM_ISP, "STATs RS violation");
		if (stats_cfg) {
		CAM_INFO(CAM_ISP,
		"STATs RS violation RGN offset cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_RS].cfg_offset));
		@@ -1584,9 +1619,13 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_RS].num_cfg));
		}
		}

		if (val & 0x040000) {
		CAM_INFO(CAM_ISP, "STATs CS violation RGN offset cfg 0x%08x",
		CAM_INFO(CAM_ISP, "STATs CS violation");
		if (stats_cfg) {
		CAM_INFO(CAM_ISP,
		"STATs CS violation RGN offset cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_CS].cfg_offset));
		@@ -1596,18 +1635,24 @@ static int cam_vfe_bus_err_bottom_half(void *handler_priv,
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_CS].num_cfg));
		}
		}

		if (val & 0x080000) {
		CAM_INFO(CAM_ISP, "STATs IHIST vltn RGN offset cfg 0x%08x",
		CAM_INFO(CAM_ISP, "STATs IHIST violation");
		if (stats_cfg) {
		CAM_INFO(CAM_ISP,
		"STATs IHIST vltn RGN offset cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_IHIST].cfg_offset));
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_IHIST].
		cfg_offset));

		CAM_INFO(CAM_ISP, "RGN num cfg 0x%08x",
		cam_io_r_mb(common_data->mem_base +
		stats_cfg[
		CAM_VFE_BUS_VER2_VFE_OUT_STATS_IHIST].num_cfg));
		}
		}

		if (val & 0x0100000)
		CAM_INFO(CAM_ISP, "DISP Y 1:1 UBWC violation");