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Commit 426fcd2a authored by Philby John's avatar Philby John Committed by Russell King
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ARM: 5774/1: Fix Realview ARM1176PB board reboot



This is the fix for proper reboot of Realview ARM1176PB board
when issuing the reboot command. Setting the eighth bit of
control register SYS_RESETCTL to 1 to force a soft reset.
arch_reset() is modified for realview machines to call machine
specific reset function pointers.

Signed-off-by: default avatarPhilby John <pjohn@in.mvista.com>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent df71dfd4
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+1 −1
Original line number Diff line number Diff line
@@ -61,5 +61,5 @@ extern void realview_timer_init(unsigned int timer_irq);
extern int realview_flash_register(struct resource *res, u32 num);
extern int realview_eth_register(const char *name, struct resource *res);
extern int realview_usb_register(struct resource *res);

extern void (*realview_reset)(char);
#endif
+5 −0
Original line number Diff line number Diff line
@@ -73,4 +73,9 @@
#define REALVIEW_PB1176_GIC_DIST_BASE		0x10041000 /* GIC distributor, on FPGA */
#define REALVIEW_PB1176_L220_BASE		0x10110000 /* L220 registers */

/*
 * Control register SYS_RESETCTL is set to 1 to force a soft reset
 */
#define REALVIEW_PB1176_SYS_LOCKVAL_RSTCTL    0x0100

#endif	/* __ASM_ARCH_BOARD_PB1176_H */
+12 −0
Original line number Diff line number Diff line
@@ -81,4 +81,16 @@
#define REALVIEW_TC11MP_GIC_DIST_BASE		0x1F001000	/* Test chip interrupt controller distributor */
#define REALVIEW_TC11MP_L220_BASE		0x1F002000	/* L220 registers */

 /*
 * Values for REALVIEW_SYS_RESET_CTRL
 */
#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGCLR    0x01
#define REALVIEW_PB11MP_SYS_CTRL_RESET_CONFIGINIT   0x02
#define REALVIEW_PB11MP_SYS_CTRL_RESET_DLLRESET     0x03
#define REALVIEW_PB11MP_SYS_CTRL_RESET_PLLRESET     0x04
#define REALVIEW_PB11MP_SYS_CTRL_RESET_POR          0x05
#define REALVIEW_PB11MP_SYS_CTRL_RESET_DoC          0x06

#define REALVIEW_PB11MP_SYS_CTRL_LED         (1 << 0)

#endif	/* __ASM_ARCH_BOARD_PB11MP_H */
+1 −14
Original line number Diff line number Diff line
@@ -119,19 +119,6 @@
#define REALVIEW_SYS_TEST_OSC3               (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
#define REALVIEW_SYS_TEST_OSC4               (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)

/* 
 * Values for REALVIEW_SYS_RESET_CTRL
 */
#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR    0x01
#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT   0x02
#define REALVIEW_SYS_CTRL_RESET_DLLRESET     0x03
#define REALVIEW_SYS_CTRL_RESET_PLLRESET     0x04
#define REALVIEW_SYS_CTRL_RESET_POR          0x05
#define REALVIEW_SYS_CTRL_RESET_DoC          0x06

#define REALVIEW_SYS_CTRL_LED         (1 << 0)


/* ------------------------------------------------------------------------
 *  RealView control registers
 * ------------------------------------------------------------------------
@@ -153,7 +140,7 @@
 *     SYS_CLD, SYS_BOOTCS
 */
#define REALVIEW_SYS_LOCK_LOCKED    (1 << 16)
#define REALVIEW_SYS_LOCKVAL_MASK	0xFFFF		/* write 0xA05F to enable write access */
#define REALVIEW_SYS_LOCKVAL_MASK	0xA05F	       /* Enable write access */

/*
 * REALVIEW_SYS_FLASH
+4 −6
Original line number Diff line number Diff line
@@ -25,6 +25,8 @@
#include <mach/hardware.h>
#include <mach/platform.h>

void (*realview_reset)(char mode);

static inline void arch_idle(void)
{
	/*
@@ -36,16 +38,12 @@ static inline void arch_idle(void)

static inline void arch_reset(char mode, const char *cmd)
{
	void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET;
	unsigned int val;

	/*
	 * To reset, we hit the on-board reset register
	 * in the system FPGA
	 */
	val = __raw_readl(hdr_ctrl);
	val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR;
	__raw_writel(val, hdr_ctrl);
	if (realview_reset)
		realview_reset(mode);
}

#endif
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