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Commit 420f51f4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull arm64 fixes from Will Deacon:
 "A few arm64 fixes came in this week, specifically fixing some nasty
  truncation of return values from firmware calls and resolving a
  VM_BUG_ON due to accessing uninitialised struct pages corresponding to
  NOMAP pages.

  Summary:

   - Fix typos in SVE documentation

   - Fix type-checking and implicit truncation for SMCCC calls

   - Force CONFIG_HOLES_IN_ZONE=y so that SLAB doesn't fall over NOMAP
     regions"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: mm: always enable CONFIG_HOLES_IN_ZONE
  arm/arm64: smccc-1.1: Handle function result as parameters
  arm/arm64: smccc-1.1: Make return values unsigned long
  Documentation/arm64/sve: Couple of improvements and typos
parents 4290d5b9 f52bb98f
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+2 −2
Original line number Diff line number Diff line
@@ -200,7 +200,7 @@ prctl(PR_SVE_SET_VL, unsigned long arg)
      thread.

    * Changing the vector length causes all of P0..P15, FFR and all bits of
      Z0..V31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
      Z0..Z31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become
      unspecified.  Calling PR_SVE_SET_VL with vl equal to the thread's current
      vector length, or calling PR_SVE_SET_VL with the PR_SVE_SET_VL_ONEXEC
      flag, does not constitute a change to the vector length for this purpose.
@@ -500,7 +500,7 @@ References
[2] arch/arm64/include/uapi/asm/ptrace.h
    AArch64 Linux ptrace ABI definitions

[3] linux/Documentation/arm64/cpu-feature-registers.txt
[3] Documentation/arm64/cpu-feature-registers.txt

[4] ARM IHI0055C
    http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf
+0 −1
Original line number Diff line number Diff line
@@ -763,7 +763,6 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK

config HOLES_IN_ZONE
	def_bool y
	depends on NUMA

source kernel/Kconfig.hz

+24 −14
Original line number Diff line number Diff line
@@ -199,47 +199,57 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,

#define __declare_arg_0(a0, res)					\
	struct arm_smccc_res   *___res = res;				\
	register u32           r0 asm("r0") = a0;			\
	register unsigned long r0 asm("r0") = (u32)a0;			\
	register unsigned long r1 asm("r1");				\
	register unsigned long r2 asm("r2");				\
	register unsigned long r3 asm("r3")

#define __declare_arg_1(a0, a1, res)					\
	typeof(a1) __a1 = a1;						\
	struct arm_smccc_res   *___res = res;				\
	register u32           r0 asm("r0") = a0;			\
	register typeof(a1)    r1 asm("r1") = a1;			\
	register unsigned long r0 asm("r0") = (u32)a0;			\
	register unsigned long r1 asm("r1") = __a1;			\
	register unsigned long r2 asm("r2");				\
	register unsigned long r3 asm("r3")

#define __declare_arg_2(a0, a1, a2, res)				\
	typeof(a1) __a1 = a1;						\
	typeof(a2) __a2 = a2;						\
	struct arm_smccc_res   *___res = res;				\
	register u32           r0 asm("r0") = a0;			\
	register typeof(a1)    r1 asm("r1") = a1;			\
	register typeof(a2)    r2 asm("r2") = a2;			\
	register unsigned long r0 asm("r0") = (u32)a0;			\
	register unsigned long r1 asm("r1") = __a1;			\
	register unsigned long r2 asm("r2") = __a2;			\
	register unsigned long r3 asm("r3")

#define __declare_arg_3(a0, a1, a2, a3, res)				\
	typeof(a1) __a1 = a1;						\
	typeof(a2) __a2 = a2;						\
	typeof(a3) __a3 = a3;						\
	struct arm_smccc_res   *___res = res;				\
	register u32           r0 asm("r0") = a0;			\
	register typeof(a1)    r1 asm("r1") = a1;			\
	register typeof(a2)    r2 asm("r2") = a2;			\
	register typeof(a3)    r3 asm("r3") = a3
	register unsigned long r0 asm("r0") = (u32)a0;			\
	register unsigned long r1 asm("r1") = __a1;			\
	register unsigned long r2 asm("r2") = __a2;			\
	register unsigned long r3 asm("r3") = __a3

#define __declare_arg_4(a0, a1, a2, a3, a4, res)			\
	typeof(a4) __a4 = a4;						\
	__declare_arg_3(a0, a1, a2, a3, res);				\
	register typeof(a4) r4 asm("r4") = a4
	register unsigned long r4 asm("r4") = __a4

#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res)			\
	typeof(a5) __a5 = a5;						\
	__declare_arg_4(a0, a1, a2, a3, a4, res);			\
	register typeof(a5) r5 asm("r5") = a5
	register unsigned long r5 asm("r5") = __a5

#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res)		\
	typeof(a6) __a6 = a6;						\
	__declare_arg_5(a0, a1, a2, a3, a4, a5, res);			\
	register typeof(a6) r6 asm("r6") = a6
	register unsigned long r6 asm("r6") = __a6

#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res)		\
	typeof(a7) __a7 = a7;						\
	__declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res);		\
	register typeof(a7) r7 asm("r7") = a7
	register unsigned long r7 asm("r7") = __a7

#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
#define __declare_args(count, ...)  ___declare_args(count, __VA_ARGS__)