Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 41fe8837 authored by Sujith Manoharan's avatar Sujith Manoharan Committed by Kalle Valo
Browse files

ath9k: Add a HW structure for WOW 



This can be used to hold the WOW state in
ath9k_hw.

Signed-off-by: default avatarSujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent 34d102c9

drivers/net/wireless/ath/ath9k/ar9003_wow.c

+5 −5
Original line number Diff line number Diff line
@@ -137,7 +137,7 @@ void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern, 
	 * other fields

	 */



	ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);

	ah->wow.wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);



	if (pattern_count < 4) {

		/* Pattern 0-3 uses AR_WOW_LENGTH1 register */
@@ -174,7 +174,7 @@ u32 ath9k_hw_wow_wakeup(struct ath_hw *ah) 
	 * register. This mask will clean it up.

	 */



	val &= ah->wow_event_mask;

	val &= ah->wow.wow_event_mask;



	if (val) {

		if (val & AR_WOW_MAGIC_PAT_FOUND)
@@ -218,7 +218,7 @@ u32 ath9k_hw_wow_wakeup(struct ath_hw *ah) 
	if (ah->is_pciexpress)

		ath9k_hw_configpcipowersave(ah, false);



	ah->wow_event_mask = 0;

	ah->wow.wow_event_mask = 0;



	return wow_status;

}
@@ -235,7 +235,7 @@ void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable) 
	 * are from the 'pattern_enable' in this function and

	 * 'pattern_count' of ath9k_hw_wow_apply_pattern()

	 */

	wow_event_mask = ah->wow_event_mask;

	wow_event_mask = ah->wow.wow_event_mask;



	/*

	 * Untie Power-on-Reset from the PCI-E-Reset. When we are in
@@ -402,6 +402,6 @@ void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable) 
	REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr);



	ath9k_hw_set_powermode_wow_sleep(ah);

	ah->wow_event_mask = wow_event_mask;

	ah->wow.wow_event_mask = wow_event_mask;

}

EXPORT_SYMBOL(ath9k_hw_wow_enable);

drivers/net/wireless/ath/ath9k/hw.h

+5 −1
Original line number Diff line number Diff line
@@ -270,6 +270,10 @@ enum ath9k_hw_caps { 
 * of those types.

 */



struct ath9k_hw_wow {

	u32 wow_event_mask;

};



struct ath9k_hw_capabilities {

	u32 hw_caps; /* ATH9K_HW_CAP_* from ath9k_hw_caps */

	u16 rts_aggr_limit;
@@ -928,7 +932,7 @@ struct ath_hw { 
	u32 ent_mode;



#ifdef CONFIG_ATH9K_WOW

	u32 wow_event_mask;

	struct ath9k_hw_wow wow;

#endif

	bool is_clk_25mhz;

	int (*get_mac_revision)(void);