Merge "drivers: pinctrl: pinctrl-msm: clear pending irq before enabling" (40e59cf1) · Commits · e / devices / android_kernel_oneplus_sm7250

drivers/irqchip/qcom-pdc.c

+21 −0

Original line number	Diff line number	Diff line
		@@ -5,6 +5,7 @@

		#include <linux/err.h>
		#include <linux/init.h>
		#include <linux/interrupt.h>
		#include <linux/ipc_logging.h>
		#include <linux/irq.h>
		#include <linux/irqchip.h>
		@@ -81,6 +82,24 @@ static void qcom_pdc_gic_disable(struct irq_data *d)
		irq_chip_disable_parent(d);
		}

		static int qcom_pdc_gic_get_irqchip_state(struct irq_data *d,
		enum irqchip_irq_state which, bool *state)
		{
		if (d->hwirq == GPIO_NO_WAKE_IRQ)
		return 0;

		return irq_chip_get_parent_state(d, which, state);
		}

		static int qcom_pdc_gic_set_irqchip_state(struct irq_data *d,
		enum irqchip_irq_state which, bool value)
		{
		if (d->hwirq == GPIO_NO_WAKE_IRQ)
		return 0;

		return irq_chip_set_parent_state(d, which, value);
		}

		static void qcom_pdc_gic_enable(struct irq_data *d)
		{
		if (d->hwirq == GPIO_NO_WAKE_IRQ)
		@@ -224,6 +243,8 @@ static struct irq_chip qcom_pdc_gic_chip = {
		.irq_unmask = qcom_pdc_gic_unmask,
		.irq_disable = qcom_pdc_gic_disable,
		.irq_enable = qcom_pdc_gic_enable,
		.irq_get_irqchip_state = qcom_pdc_gic_get_irqchip_state,
		.irq_set_irqchip_state = qcom_pdc_gic_set_irqchip_state,
		.irq_retrigger = irq_chip_retrigger_hierarchy,
		.irq_set_type = qcom_pdc_gic_set_type,
		.flags = IRQCHIP_MASK_ON_SUSPEND \|

+12 −1

Original line number	Diff line number	Diff line
		@@ -746,8 +746,19 @@ static void msm_gpio_irq_enable(struct irq_data *d)
		struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
		struct msm_pinctrl *pctrl = gpiochip_get_data(gc);

		if (d->parent_data)
		if (d->parent_data) {
		/*
		* Clear the interrupt that may be pending before we enable
		* the line.
		* This is especially a problem with the GPIOs routed to the
		* PDC. These GPIOs are direct-connect interrupts to the GIC.
		* Disabling the interrupt line at the PDC does not prevent
		* the interrupt from being latched at the GIC. The state at
		* GIC needs to be cleared before enabling.
		*/
		irq_chip_set_parent_state(d, IRQCHIP_STATE_PENDING, 0);
		irq_chip_enable_parent(d);
		}

		if (test_bit(d->hwirq, pctrl->wakeup_masked_irqs))
		return;