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Commit 4078e637 authored by Tariq Toukan's avatar Tariq Toukan Committed by David S. Miller
Browse files

net/mlx5e: Do not reduce LRO WQE size when not using build_skb 



When rq_type is Striding RQ, no room of SKB_RESERVE is needed
as SKB allocation is not done via build_skb.

Fixes: e4b85508 ("net/mlx5e: Slightly reduce hardware LRO size")
Signed-off-by: default avatarTariq Toukan <tariqt@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6f08a22c

drivers/net/ethernet/mellanox/mlx5/core/en_main.c

+5 −6
Original line number Diff line number Diff line
@@ -82,6 +82,7 @@ static bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev) 
static void mlx5e_set_rq_type_params(struct mlx5e_priv *priv, u8 rq_type)

{

	priv->params.rq_wq_type = rq_type;

	priv->params.lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;

	switch (priv->params.rq_wq_type) {

	case MLX5_WQ_TYPE_LINKED_LIST_STRIDING_RQ:

		priv->params.log_rq_size = is_kdump_kernel() ?
@@ -98,6 +99,10 @@ static void mlx5e_set_rq_type_params(struct mlx5e_priv *priv, u8 rq_type) 
		priv->params.log_rq_size = is_kdump_kernel() ?

			MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE :

			MLX5E_PARAMS_DEFAULT_LOG_RQ_SIZE;



		/* Extra room needed for build_skb */

		priv->params.lro_wqe_sz -= MLX5_RX_HEADROOM +

			SKB_DATA_ALIGN(sizeof(struct skb_shared_info));

	}

	priv->params.min_rx_wqes = mlx5_min_rx_wqes(priv->params.rq_wq_type,

					       BIT(priv->params.log_rq_size));
@@ -3547,12 +3552,6 @@ static void mlx5e_build_nic_netdev_priv(struct mlx5_core_dev *mdev, 
	mlx5e_build_default_indir_rqt(mdev, priv->params.indirection_rqt,

				      MLX5E_INDIR_RQT_SIZE, profile->max_nch(mdev));



	priv->params.lro_wqe_sz =

		MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ -

		/* Extra room needed for build_skb */

		MLX5_RX_HEADROOM -

		SKB_DATA_ALIGN(sizeof(struct skb_shared_info));



	/* Initialize pflags */

	MLX5E_SET_PFLAG(priv, MLX5E_PFLAG_RX_CQE_BASED_MODER,

			priv->params.rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE);