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Commit 4063642b authored by Larry Finger's avatar Larry Finger Committed by Greg Kroah-Hartman
Browse files

staging: r8188eu: Replace wrappers ODM_delay_ms() and rtw_mdelay_os() with a simple mdelay 



Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 0da46e6b

drivers/staging/rtl8188eu/core/rtw_mp.c

+2 −2
Original line number Diff line number Diff line
@@ -858,11 +858,11 @@ static u32 rtw_GetPSDData(struct adapter *pAdapter, u32 point) 
	psd_val |= point;



	rtw_write32(pAdapter, 0x808, psd_val);

	rtw_mdelay_os(1);

	mdelay(1);

	psd_val |= 0x00400000;



	rtw_write32(pAdapter, 0x808, psd_val);

	rtw_mdelay_os(1);

	mdelay(1);

	psd_val = rtw_read32(pAdapter, 0x8B4);



	psd_val &= 0x0000FFFF;

drivers/staging/rtl8188eu/hal/HalPhyRf_8188e.c

+5 −5
Original line number Diff line number Diff line
@@ -502,7 +502,7 @@ phy_PathA_IQK_8188E(struct adapter *adapt, bool configPathB) 
	/*  delay x ms */

	ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E));

	/* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */

	ODM_delay_ms(IQK_DELAY_TIME_88E);

	mdelay(IQK_DELAY_TIME_88E);



	/*  Check failed */

	regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord);
@@ -568,7 +568,7 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) 
	ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,

		     ("Delay %d ms for One shot, path A LOK & IQK.\n",

		     IQK_DELAY_TIME_88E));

	ODM_delay_ms(IQK_DELAY_TIME_88E);

	mdelay(IQK_DELAY_TIME_88E);



	/*  Check failed */

	regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord);
@@ -623,7 +623,7 @@ phy_PathA_RxIQK(struct adapter *adapt, bool configPathB) 
	/*  delay x ms */

	ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME_88E));

	/* PlatformStallExecution(IQK_DELAY_TIME_88E*1000); */

	ODM_delay_ms(IQK_DELAY_TIME_88E);

	mdelay(IQK_DELAY_TIME_88E);



	/*  Check failed */

	regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord);
@@ -667,7 +667,7 @@ phy_PathB_IQK_8188E(struct adapter *adapt) 
	ODM_RT_TRACE(dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD,

		     ("Delay %d ms for One shot, path B LOK & IQK.\n",

		     IQK_DELAY_TIME_88E));

	ODM_delay_ms(IQK_DELAY_TIME_88E);

	mdelay(IQK_DELAY_TIME_88E);



	/*  Check failed */

	regeac = ODM_GetBBReg(dm_odm, rRx_Power_After_IQK_A_2, bMaskDWord);
@@ -1447,7 +1447,7 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt) 
		return;



	while (*(dm_odm->pbScanInProcess) && timecount < timeout) {

		ODM_delay_ms(50);

		mdelay(50);

		timecount += 50;

	}

drivers/staging/rtl8188eu/hal/odm_RegConfig8188E.c

+6 −6
Original line number Diff line number Diff line
@@ -27,9 +27,9 @@ void odm_ConfigRFReg_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, 
    if (Addr == 0xffe) {

		msleep(50);

	} else if (Addr == 0xfd) {

		ODM_delay_ms(5);

		mdelay(5);

	} else if (Addr == 0xfc) {

		ODM_delay_ms(1);

		mdelay(1);

	} else if (Addr == 0xfb) {

		ODM_delay_us(50);

	} else if (Addr == 0xfa) {
@@ -85,9 +85,9 @@ void odm_ConfigBB_PHY_REG_PG_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, 
	if (Addr == 0xfe) {

		msleep(50);

	} else if (Addr == 0xfd) {

		ODM_delay_ms(5);

		mdelay(5);

	} else if (Addr == 0xfc) {

		ODM_delay_ms(1);

		mdelay(1);

	} else if (Addr == 0xfb) {

		ODM_delay_us(50);

	} else if (Addr == 0xfa) {
@@ -107,9 +107,9 @@ void odm_ConfigBB_PHY_8188E(struct odm_dm_struct *pDM_Odm, u32 Addr, u32 Bitmask 
	if (Addr == 0xfe) {

		msleep(50);

	} else if (Addr == 0xfd) {

		ODM_delay_ms(5);

		mdelay(5);

	} else if (Addr == 0xfc) {

		ODM_delay_ms(1);

		mdelay(1);

	} else if (Addr == 0xfb) {

		ODM_delay_us(50);

	} else if (Addr == 0xfa) {

drivers/staging/rtl8188eu/hal/odm_interface.c

+0 −5
Original line number Diff line number Diff line
@@ -152,11 +152,6 @@ void ODM_StallExecution(u32 usDelay) 
	rtw_udelay_os(usDelay);

}



void ODM_delay_ms(u32 ms)

{

	rtw_mdelay_os(ms);

}



void ODM_delay_us(u32 us)

{

	rtw_udelay_os(us);

drivers/staging/rtl8188eu/hal/rtl8188e_cmd.c

+1 −1
Original line number Diff line number Diff line
@@ -656,7 +656,7 @@ _func_enter_; 
			DLBcnCount++;

			do {

				rtw_yield_os();

				/* rtw_mdelay_os(10); */

				/* mdelay(10); */

				/*  check rsvd page download OK. */

				rtw_hal_get_hwreg(adapt, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));

				poll++;