Commit 3fddd407 authored Dec 19, 2013 by Paulo Zanoni Committed by Daniel Vetter Feb 12, 2014

drm/i915: remove the vblank_wait hack from HSW+

When I forked haswell_crtc_enable I copied all the code from
ironlake_crtc_enable. The last piece of the function contains a big
comment with a call to intel_wait_for_vblank. After this fork, we
rearranged the Haswell code so that it enables the planes as the very
last step of the modeset sequence, so we're sure that we call
intel_enable_primary_plane after the pipe is really running, so the
vblank waiting functions work as expected. I really believe this is
what fixes the problem described by the big comment, so let's give it
a try and get rid of that intel_wait_for_vblank, saving around 16ms
per modeset (and init/resume). We can always revert if needed :)

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent f1ff6965

drivers/gpu/drm/i915/intel_display.c

+0 −10

Original line number	Original line	Diff line number	Diff line
	@@ -3761,16 +3761,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
	* to change the workaround. */		* to change the workaround. */
	haswell_mode_set_planes_workaround(intel_crtc);		haswell_mode_set_planes_workaround(intel_crtc);
	haswell_crtc_enable_planes(crtc);		haswell_crtc_enable_planes(crtc);

	/*
	* There seems to be a race in PCH platform hw (at least on some
	* outputs) where an enabled pipe still completes any pageflip right
	* away (as if the pipe is off) instead of waiting for vblank. As soon
	* as the first vblank happend, everything works as expected. Hence just
	* wait for one vblank before returning to avoid strange things
	* happening.
	*/
	intel_wait_for_vblank(dev, intel_crtc->pipe);
	}		}

	static void ironlake_pfit_disable(struct intel_crtc *crtc)		static void ironlake_pfit_disable(struct intel_crtc *crtc)