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Commit 3fd4b751 authored by Michel Dänzer's avatar Michel Dänzer Committed by Alex Deucher
Browse files

drm/amdgpu: Set MASTER_UPDATE_MODE to 0 again 



With the previous change, it's safe to let page flips take effect
anytime during a vertical blank period.

This can avoid delaying a flip by a frame in some cases where we get to
amdgpu_flip_work_func -> adev->mode_info.funcs->page_flip during a
vertical blank period.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 325cbba1

drivers/gpu/drm/amd/amdgpu/dce_v10_0.c

+4 −4
Original line number Diff line number Diff line
@@ -646,8 +646,8 @@ static void dce_v10_0_resume_mc_access(struct amdgpu_device *adev, 


		if (save->crtc_enabled[i]) {

			tmp = RREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i]);

			if (REG_GET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE) != 3) {

				tmp = REG_SET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE, 3);

			if (REG_GET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE) != 0) {

				tmp = REG_SET_FIELD(tmp, MASTER_UPDATE_MODE, MASTER_UPDATE_MODE, 0);

				WREG32(mmMASTER_UPDATE_MODE + crtc_offsets[i], tmp);

			}

			tmp = RREG32(mmGRPH_UPDATE + crtc_offsets[i]);
@@ -2314,8 +2314,8 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc, 
	WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset,

	       (viewport_w << 16) | viewport_h);



	/* set pageflip to happen only at start of vblank interval (front porch) */

	WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3);

	/* set pageflip to happen anywhere in vblank interval */

	WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);



	if (!atomic && fb && fb != crtc->primary->fb) {

		amdgpu_fb = to_amdgpu_framebuffer(fb);

drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

+2 −2
Original line number Diff line number Diff line
@@ -2297,8 +2297,8 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc, 
	WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset,

	       (viewport_w << 16) | viewport_h);



	/* set pageflip to happen only at start of vblank interval (front porch) */

	WREG32(mmCRTC_MASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3);

	/* set pageflip to happen anywhere in vblank interval */

	WREG32(mmCRTC_MASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);



	if (!atomic && fb && fb != crtc->primary->fb) {

		amdgpu_fb = to_amdgpu_framebuffer(fb);

drivers/gpu/drm/amd/amdgpu/dce_v8_0.c

+2 −2
Original line number Diff line number Diff line
@@ -2183,8 +2183,8 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc, 
	WREG32(mmVIEWPORT_SIZE + amdgpu_crtc->crtc_offset,

	       (viewport_w << 16) | viewport_h);



	/* set pageflip to happen only at start of vblank interval (front porch) */

	WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3);

	/* set pageflip to happen anywhere in vblank interval */

	WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);



	if (!atomic && fb && fb != crtc->primary->fb) {

		amdgpu_fb = to_amdgpu_framebuffer(fb);