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Commit 3f4e5aac authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar:
 "Three small fixlets"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/intel/cacheinfo: Shut up annoying warning
  x86, doc: Boot protocol 2.12 is in 3.8
  x86-64: Replace left over sti/cli in ia32 audit exit code
parents 2a6f79e8 f76e39c5
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+1 −1
Original line number Diff line number Diff line
@@ -57,7 +57,7 @@ Protocol 2.10: (Kernel 2.6.31) Added a protocol for relaxed alignment
Protocol 2.11:	(Kernel 3.6) Added a field for offset of EFI handover
		protocol entry point.

Protocol 2.12:	(Kernel 3.9) Added the xloadflags field and extension fields
Protocol 2.12:	(Kernel 3.8) Added the xloadflags field and extension fields
	 	to struct boot_params for for loading bzImage and ramdisk
		above 4G in 64bit.

+2 −2
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ sysexit_from_sys_call:
	testl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
	jnz ia32_ret_from_sys_call
	TRACE_IRQS_ON
	sti
	ENABLE_INTERRUPTS(CLBR_NONE)
	movl %eax,%esi		/* second arg, syscall return value */
	cmpl $-MAX_ERRNO,%eax	/* is it an error ? */
	jbe 1f
@@ -217,7 +217,7 @@ sysexit_from_sys_call:
	call __audit_syscall_exit
	movq RAX-ARGOFFSET(%rsp),%rax	/* reload syscall return value */
	movl $(_TIF_ALLWORK_MASK & ~_TIF_SYSCALL_AUDIT),%edi
	cli
	DISABLE_INTERRUPTS(CLBR_NONE)
	TRACE_IRQS_OFF
	testl %edi,TI_flags+THREAD_INFO(%rsp,RIP-ARGOFFSET)
	jz \exit
+3 −4
Original line number Diff line number Diff line
@@ -298,8 +298,7 @@ struct _cache_attr {
			 unsigned int);
};

#ifdef CONFIG_AMD_NB

#if defined(CONFIG_AMD_NB) && defined(CONFIG_SYSFS)
/*
 * L3 cache descriptors
 */
@@ -524,9 +523,9 @@ store_subcaches(struct _cpuid4_info *this_leaf, const char *buf, size_t count,
static struct _cache_attr subcaches =
	__ATTR(subcaches, 0644, show_subcaches, store_subcaches);

#else	/* CONFIG_AMD_NB */
#else
#define amd_init_l3_cache(x, y)
#endif /* CONFIG_AMD_NB */
#endif  /* CONFIG_AMD_NB && CONFIG_SYSFS */

static int
__cpuinit cpuid4_cache_lookup_regs(int index,