Merge 21b3cad0bef4d429a802e960705ce003405e073f on remote branch (3ecec726) · Commits · e / devices / android_kernel_oneplus_sm7250

asoc/codecs/wsa883x/wsa883x.c

+14 −0

Original line number	Diff line number	Diff line
		@@ -108,6 +108,7 @@ static const struct wsa_reg_mask_val reg_init[] = {
		{WSA883X_ADC_7, 0x04, 0x04},
		{WSA883X_ADC_7, 0x02, 0x02},
		{WSA883X_CKWD_CTL_0, 0x60, 0x00},
		{WSA883X_DRE_CTL_1, 0x3E, 0x20},
		{WSA883X_CKWD_CTL_1, 0x1F, 0x1B},
		{WSA883X_GMAMP_SUP1, 0x60, 0x60},
		};
		@@ -986,6 +987,12 @@ static int wsa883x_spkr_event(struct snd_soc_dapm_widget *w,
		swr_slvdev_datapath_control(wsa883x->swr_slave,
		wsa883x->swr_slave->dev_num,
		true);
		/* Added delay as per HW sequence */
		usleep_range(250, 300);
		snd_soc_component_update_bits(component, WSA883X_DRE_CTL_1,
		0x01, 0x01);
		/* Added delay as per HW sequence */
		usleep_range(250, 300);
		/* Force remove group */
		swr_remove_from_group(wsa883x->swr_slave,
		wsa883x->swr_slave->dev_num);
		@@ -1393,6 +1400,13 @@ static int wsa883x_event_notify(struct notifier_block *nb,
		0x01, 0x01);
		wcd_enable_irq(&wsa883x->irq_info,
		WSA883X_IRQ_INT_PDM_WD);
		/* Added delay as per HW sequence */
		usleep_range(3000, 3100);
		snd_soc_component_update_bits(wsa883x->component,
		WSA883X_DRE_CTL_1,
		0x01, 0x00);
		/* Added delay as per HW sequence */
		usleep_range(5000, 5050);
		}
		break;
		case BOLERO_WSA_EVT_PA_ON_POST_FSCLK_ADIE_LB:

soc/swr-mstr-ctrl.c

+25 −20

Original line number	Diff line number	Diff line
		@@ -1744,6 +1744,7 @@ static void swrm_enable_slave_irq(struct swr_mstr_ctrl *swrm)
		{
		int i;
		int status = 0;
		u32 temp;

		status = swr_master_read(swrm, SWRM_MCP_SLV_STATUS);
		if (!status) {
		@@ -1754,6 +1755,8 @@ static void swrm_enable_slave_irq(struct swr_mstr_ctrl *swrm)
		dev_dbg(swrm->dev, "%s: slave status: 0x%x\n", __func__, status);
		for (i = 0; i < (swrm->master.num_dev + 1); i++) {
		if (status & SWRM_MCP_SLV_STATUS_MASK) {
		swrm_cmd_fifo_rd_cmd(swrm, &temp, i, 0x0,
		SWRS_SCP_INT_STATUS_CLEAR_1, 1);
		swrm_cmd_fifo_wr_cmd(swrm, 0xFF, i, 0x0,
		SWRS_SCP_INT_STATUS_CLEAR_1);
		swrm_cmd_fifo_wr_cmd(swrm, 0x4, i, 0x0,
		@@ -2069,10 +2072,7 @@ static irqreturn_t swr_mstr_interrupt_v2(int irq, void *dev)
		* as hw will mask host_irq at slave
		* but will not unmask it afterwards.
		*/
		swrm_cmd_fifo_wr_cmd(swrm, 0xFF, devnum, 0x0,
		SWRS_SCP_INT_STATUS_CLEAR_1);
		swrm_cmd_fifo_wr_cmd(swrm, 0x4, devnum, 0x0,
		SWRS_SCP_INT_STATUS_MASK_1);
		swrm->enable_slave_irq = true;
		}
		break;
		case SWR_ATTACHED_OK:
		@@ -2080,11 +2080,7 @@ static irqreturn_t swr_mstr_interrupt_v2(int irq, void *dev)
		"%s: device %d got attached\n",
		__func__, devnum);
		/* enable host irq from slave device*/
		swrm_cmd_fifo_wr_cmd(swrm, 0xFF, devnum, 0x0,
		SWRS_SCP_INT_STATUS_CLEAR_1);
		swrm_cmd_fifo_wr_cmd(swrm, 0x4, devnum, 0x0,
		SWRS_SCP_INT_STATUS_MASK_1);

		swrm->enable_slave_irq = true;
		break;
		case SWR_ALERT:
		dev_dbg(swrm->dev,
		@@ -2161,20 +2157,21 @@ static irqreturn_t swr_mstr_interrupt_v2(int irq, void *dev)
		case SWRM_INTERRUPT_STATUS_CLK_STOP_FINISHED_V2:
		break;
		case SWRM_INTERRUPT_STATUS_EXT_CLK_STOP_WAKEUP:
		if (swrm->state == SWR_MSTR_UP)
		if (swrm->state == SWR_MSTR_UP) {
		dev_dbg(swrm->dev,
		"%s:SWR Master is already up\n",
		__func__);
		else
		} else {
		dev_err_ratelimited(swrm->dev,
		"%s: SWR wokeup during clock stop\n",
		__func__);
		/* It might be possible the slave device gets reset
		* and slave interrupt gets missed. So re-enable
		* Host IRQ and process slave pending
		/* It might be possible the slave device gets
		* reset and slave interrupt gets missed. So
		* re-enable Host IRQ and process slave pending
		* interrupts, if any.
		*/
		swrm_enable_slave_irq(swrm);
		}
		break;
		default:
		dev_err_ratelimited(swrm->dev,
		@@ -2187,6 +2184,12 @@ static irqreturn_t swr_mstr_interrupt_v2(int irq, void *dev)
		swr_master_write(swrm, SWRM_INTERRUPT_CLEAR, intr_sts);
		swr_master_write(swrm, SWRM_INTERRUPT_CLEAR, 0x0);

		if (swrm->enable_slave_irq) {
		/* Enable slave irq here */
		swrm_enable_slave_irq(swrm);
		swrm->enable_slave_irq = false;
		}

		intr_sts = swr_master_read(swrm, SWRM_INTERRUPT_STATUS);
		intr_sts_masked = intr_sts & swrm->intr_mask;

		@@ -2473,9 +2476,6 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm)
		reg[len] = SWRM_COMP_CFG_ADDR;
		value[len++] = 0x02;

		reg[len] = SWRM_COMP_CFG_ADDR;
		value[len++] = 0x03;

		reg[len] = SWRM_INTERRUPT_CLEAR;
		value[len++] = 0xFFFFFFFF;

		@@ -2487,6 +2487,9 @@ static int swrm_master_init(struct swr_mstr_ctrl *swrm)
		reg[len] = SWR_MSTR_RX_SWRM_CPU_INTERRUPT_EN;
		value[len++] = swrm->intr_mask;

		reg[len] = SWRM_COMP_CFG_ADDR;
		value[len++] = 0x03;

		swr_master_bulk_write(swrm, reg, value, len);

		if (!swrm_check_link_status(swrm, 0x1)) {
		@@ -2659,6 +2662,8 @@ static int swrm_probe(struct platform_device *pdev)
		SWRM_NUM_AUTO_ENUM_SLAVES);
		ret = -EINVAL;
		goto err_pdata_fail;
		} else {
		swrm->master.num_dev = swrm->num_dev;
		}
		}

soc/swr-mstr-ctrl.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -184,6 +184,7 @@ struct swr_mstr_ctrl {
		u32 disable_div2_clk_switch;
		u32 rd_fifo_depth;
		u32 wr_fifo_depth;
		bool enable_slave_irq;
		#ifdef CONFIG_DEBUG_FS
		struct dentry *debugfs_swrm_dent;
		struct dentry *debugfs_peek;