Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3e944c76 authored by Georgi Djakov's avatar Georgi Djakov Committed by Kumar Gala
Browse files

ARM: dts: msm: Add SDHC controller nodes for MSM8974 and DB8074 board 



Add support for the 2 SDHC controllers on the DB8074 board.  The first
controller (at 0xf9824900) is connected to an on board soldered eMMC.
The second controller (at 0xf98a4900) is connected to a uSD card slot.

Signed-off-by: default avatarGeorgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
parent 7d7db8db

arch/arm/boot/dts/qcom-apq8074-dragonboard.dts

+13 −0
Original line number Diff line number Diff line
@@ -3,4 +3,17 @@ 
/ {

	model = "Qualcomm APQ8074 Dragonboard";

	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";



	soc: soc {

		sdhci@f9824900 {

			bus-width = <8>;

			non-removable;

			status = "ok";

		};



		sdhci@f98a4900 {

			cd-gpios = <&msmgpio 62 0x1>;

			bus-width = <4>;

		};

	};

};

arch/arm/boot/dts/qcom-msm8974.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -192,6 +192,28 @@ 
			clock-names = "core", "iface";

		};



		sdhci@f9824900 {

			compatible = "qcom,sdhci-msm-v4";

			reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;

			reg-names = "hc_mem", "core_mem";

			interrupts = <0 123 0>, <0 138 0>;

			interrupt-names = "hc_irq", "pwr_irq";

			clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;

			clock-names = "core", "iface";

			status = "disabled";

		};



		sdhci@f98a4900 {

			compatible = "qcom,sdhci-msm-v4";

			reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;

			reg-names = "hc_mem", "core_mem";

			interrupts = <0 125 0>, <0 221 0>;

			interrupt-names = "hc_irq", "pwr_irq";

			clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;

			clock-names = "core", "iface";

			status = "disabled";

		};



		rng@f9bff000 {

			compatible = "qcom,prng";

			reg = <0xf9bff000 0x200>;