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Commit 3e5cb98d authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: add support for msi



Try to enable msi on chips that support it.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent ebbe1cb9
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+16 −1
Original line number Original line Diff line number Diff line
@@ -186,7 +186,7 @@ static inline uint32_t r100_irq_ack(struct radeon_device *rdev)


int r100_irq_process(struct radeon_device *rdev)
int r100_irq_process(struct radeon_device *rdev)
{
{
	uint32_t status;
	uint32_t status, msi_rearm;


	status = r100_irq_ack(rdev);
	status = r100_irq_ack(rdev);
	if (!status) {
	if (!status) {
@@ -209,6 +209,21 @@ int r100_irq_process(struct radeon_device *rdev)
		}
		}
		status = r100_irq_ack(rdev);
		status = r100_irq_ack(rdev);
	}
	}
	if (rdev->msi_enabled) {
		switch (rdev->family) {
		case CHIP_RS400:
		case CHIP_RS480:
			msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM;
			WREG32(RADEON_AIC_CNTL, msi_rearm);
			WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
			break;
		default:
			msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
			WREG32(RADEON_MSI_REARM_EN, msi_rearm);
			WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
			break;
		}
	}
	return IRQ_HANDLED;
	return IRQ_HANDLED;
}
}


+1 −0
Original line number Original line Diff line number Diff line
@@ -784,6 +784,7 @@ struct radeon_device {
	const struct firmware *me_fw;	/* all family ME firmware */
	const struct firmware *me_fw;	/* all family ME firmware */
	const struct firmware *pfp_fw;	/* r6/700 PFP firmware */
	const struct firmware *pfp_fw;	/* r6/700 PFP firmware */
	struct r600_blit r600_blit;
	struct r600_blit r600_blit;
	int msi_enabled; /* msi enabled */
};
};


int radeon_device_init(struct radeon_device *rdev,
int radeon_device_init(struct radeon_device *rdev,
+9 −0
Original line number Original line Diff line number Diff line
@@ -92,6 +92,13 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
	if (r) {
	if (r) {
		return r;
		return r;
	}
	}
	/* enable msi */
	rdev->msi_enabled = 0;
	if (rdev->family >= CHIP_RV380) {
		int ret = pci_enable_msi(rdev->pdev);
		if (!ret)
			rdev->msi_enabled = 1;
	}
	drm_irq_install(rdev->ddev);
	drm_irq_install(rdev->ddev);
	rdev->irq.installed = true;
	rdev->irq.installed = true;
	DRM_INFO("radeon: irq initialized.\n");
	DRM_INFO("radeon: irq initialized.\n");
@@ -103,5 +110,7 @@ void radeon_irq_kms_fini(struct radeon_device *rdev)
	if (rdev->irq.installed) {
	if (rdev->irq.installed) {
		rdev->irq.installed = false;
		rdev->irq.installed = false;
		drm_irq_uninstall(rdev->ddev);
		drm_irq_uninstall(rdev->ddev);
		if (rdev->msi_enabled)
			pci_disable_msi(rdev->pdev);
	}
	}
}
}
+6 −0
Original line number Original line Diff line number Diff line
@@ -290,6 +290,8 @@
#define RADEON_BUS_CNTL                     0x0030
#define RADEON_BUS_CNTL                     0x0030
#       define RADEON_BUS_MASTER_DIS         (1 << 6)
#       define RADEON_BUS_MASTER_DIS         (1 << 6)
#       define RADEON_BUS_BIOS_DIS_ROM       (1 << 12)
#       define RADEON_BUS_BIOS_DIS_ROM       (1 << 12)
#	define RS600_BUS_MASTER_DIS	     (1 << 14)
#	define RS600_MSI_REARM		     (1 << 20) /* rs600/rs690/rs740 */
#       define RADEON_BUS_RD_DISCARD_EN      (1 << 24)
#       define RADEON_BUS_RD_DISCARD_EN      (1 << 24)
#       define RADEON_BUS_RD_ABORT_EN        (1 << 25)
#       define RADEON_BUS_RD_ABORT_EN        (1 << 25)
#       define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
#       define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
@@ -297,6 +299,9 @@
#       define RADEON_BUS_READ_BURST         (1 << 30)
#       define RADEON_BUS_READ_BURST         (1 << 30)
#define RADEON_BUS_CNTL1                    0x0034
#define RADEON_BUS_CNTL1                    0x0034
#       define RADEON_BUS_WAIT_ON_LOCK_EN    (1 << 4)
#       define RADEON_BUS_WAIT_ON_LOCK_EN    (1 << 4)
/* rv370/rv380, rv410, r423/r430/r480, r5xx */
#define RADEON_MSI_REARM_EN		    0x0160
#	define RV370_MSI_REARM_EN	     (1 << 0)


/* #define RADEON_PCIE_INDEX                   0x0030 */
/* #define RADEON_PCIE_INDEX                   0x0030 */
/* #define RADEON_PCIE_DATA                    0x0034 */
/* #define RADEON_PCIE_DATA                    0x0034 */
@@ -3311,6 +3316,7 @@
#define RADEON_AIC_CNTL                     0x01d0
#define RADEON_AIC_CNTL                     0x01d0
#       define RADEON_PCIGART_TRANSLATE_EN     (1 << 0)
#       define RADEON_PCIGART_TRANSLATE_EN     (1 << 0)
#       define RADEON_DIS_OUT_OF_PCI_GART_ACCESS     (1 << 1)
#       define RADEON_DIS_OUT_OF_PCI_GART_ACCESS     (1 << 1)
#	define RS400_MSI_REARM	                (1 << 3) /* rs400/rs480 */
#define RADEON_AIC_LO_ADDR                  0x01dc
#define RADEON_AIC_LO_ADDR                  0x01dc
#define RADEON_AIC_PT_BASE		0x01d8
#define RADEON_AIC_PT_BASE		0x01d8
#define RADEON_AIC_HI_ADDR		0x01e0
#define RADEON_AIC_HI_ADDR		0x01e0
+17 −1
Original line number Original line Diff line number Diff line
@@ -242,7 +242,7 @@ void rs600_irq_disable(struct radeon_device *rdev)


int rs600_irq_process(struct radeon_device *rdev)
int rs600_irq_process(struct radeon_device *rdev)
{
{
	uint32_t status;
	uint32_t status, msi_rearm;
	uint32_t r500_disp_int;
	uint32_t r500_disp_int;


	status = rs600_irq_ack(rdev, &r500_disp_int);
	status = rs600_irq_ack(rdev, &r500_disp_int);
@@ -260,6 +260,22 @@ int rs600_irq_process(struct radeon_device *rdev)
			drm_handle_vblank(rdev->ddev, 1);
			drm_handle_vblank(rdev->ddev, 1);
		status = rs600_irq_ack(rdev, &r500_disp_int);
		status = rs600_irq_ack(rdev, &r500_disp_int);
	}
	}
	if (rdev->msi_enabled) {
		switch (rdev->family) {
		case CHIP_RS600:
		case CHIP_RS690:
		case CHIP_RS740:
			msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM;
			WREG32(RADEON_BUS_CNTL, msi_rearm);
			WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
			break;
		default:
			msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
			WREG32(RADEON_MSI_REARM_EN, msi_rearm);
			WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
			break;
		}
	}
	return IRQ_HANDLED;
	return IRQ_HANDLED;
}
}