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Commit 3de676d8 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: allow get_vm_pde to change flags as well



And also provide the level for which we need a PDE.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarChunming Zhou <david1.zhou@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6989f246
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+3 −2
Original line number Diff line number Diff line
@@ -346,7 +346,8 @@ struct amdgpu_gart_funcs {
	uint64_t (*get_vm_pte_flags)(struct amdgpu_device *adev,
				     uint32_t flags);
	/* get the pde for a given mc addr */
	u64 (*get_vm_pde)(struct amdgpu_device *adev, u64 addr);
	void (*get_vm_pde)(struct amdgpu_device *adev, int level,
			   u64 *dst, u64 *flags);
	uint32_t (*get_invalidate_req)(unsigned int vm_id);
};

@@ -1826,7 +1827,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
#define amdgpu_asic_get_config_memsize(adev) (adev)->asic_funcs->get_config_memsize((adev))
#define amdgpu_gart_flush_gpu_tlb(adev, vmid) (adev)->gart.gart_funcs->flush_gpu_tlb((adev), (vmid))
#define amdgpu_gart_set_pte_pde(adev, pt, idx, addr, flags) (adev)->gart.gart_funcs->set_pte_pde((adev), (pt), (idx), (addr), (flags))
#define amdgpu_gart_get_vm_pde(adev, addr) (adev)->gart.gart_funcs->get_vm_pde((adev), (addr))
#define amdgpu_gart_get_vm_pde(adev, level, dst, flags) (adev)->gart.gart_funcs->get_vm_pde((adev), (level), (dst), (flags))
#define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib), (pe), (src), (count)))
#define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->write_pte((ib), (pe), (value), (count), (incr)))
#define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_funcs->set_pte_pde((ib), (pe), (addr), (count), (incr), (flags)))
+13 −7
Original line number Diff line number Diff line
@@ -1070,9 +1070,10 @@ static void amdgpu_vm_update_pde(struct amdgpu_pte_update_params *params,
				 struct amdgpu_vm_pt *parent,
				 struct amdgpu_vm_pt *entry)
{
	struct amdgpu_bo *bo = entry->base.bo, *shadow = NULL;
	struct amdgpu_bo *bo = entry->base.bo, *shadow = NULL, *pbo;
	uint64_t pd_addr, shadow_addr = 0;
	uint64_t pde, pt;
	uint64_t pde, pt, flags;
	unsigned level;

	/* Don't update huge pages here */
	if (entry->huge)
@@ -1087,15 +1088,19 @@ static void amdgpu_vm_update_pde(struct amdgpu_pte_update_params *params,
			shadow_addr = amdgpu_bo_gpu_offset(shadow);
	}

	for (level = 0, pbo = parent->base.bo->parent; pbo; ++level)
		pbo = pbo->parent;

	pt = amdgpu_bo_gpu_offset(bo);
	pt = amdgpu_gart_get_vm_pde(params->adev, pt);
	flags = AMDGPU_PTE_VALID;
	amdgpu_gart_get_vm_pde(params->adev, level, &pt, &flags);
	if (shadow) {
		pde = shadow_addr + (entry - parent->entries) * 8;
		params->func(params, pde, pt, 1, 0, AMDGPU_PTE_VALID);
		params->func(params, pde, pt, 1, 0, flags);
	}

	pde = pd_addr + (entry - parent->entries) * 8;
	params->func(params, pde, pt, 1, 0, AMDGPU_PTE_VALID);
	params->func(params, pde, pt, 1, 0, flags);
}

/*
@@ -1305,7 +1310,6 @@ static void amdgpu_vm_handle_huge_pages(struct amdgpu_pte_update_params *p,
	    !(flags & AMDGPU_PTE_VALID)) {

		dst = amdgpu_bo_gpu_offset(entry->base.bo);
		dst = amdgpu_gart_get_vm_pde(p->adev, dst);
		flags = AMDGPU_PTE_VALID;
	} else {
		/* Set the huge page flag to stop scanning at this PDE */
@@ -1314,9 +1318,11 @@ static void amdgpu_vm_handle_huge_pages(struct amdgpu_pte_update_params *p,

	if (!entry->huge && !(flags & AMDGPU_PDE_PTE))
		return;

	entry->huge = !!(flags & AMDGPU_PDE_PTE);

	amdgpu_gart_get_vm_pde(p->adev, p->adev->vm_manager.num_level - 1,
			       &dst, &flags);

	if (use_cpu_update) {
		/* In case a huge page is replaced with a system
		 * memory mapping, p->pages_addr != NULL and
+3 −2
Original line number Diff line number Diff line
@@ -3686,10 +3686,11 @@ static void gfx_v9_0_ring_emit_vm_flush(struct amdgpu_ring *ring,
	struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->funcs->vmhub];
	int usepfp = (ring->funcs->type == AMDGPU_RING_TYPE_GFX);
	uint32_t req = ring->adev->gart.gart_funcs->get_invalidate_req(vm_id);
	uint64_t flags = AMDGPU_PTE_VALID;
	unsigned eng = ring->vm_inv_eng;

	pd_addr = amdgpu_gart_get_vm_pde(ring->adev, pd_addr);
	pd_addr |= AMDGPU_PTE_VALID;
	amdgpu_gart_get_vm_pde(ring->adev, -1, &pd_addr, &flags);
	pd_addr |= flags;

	gfx_v9_0_write_data_to_reg(ring, usepfp, true,
				   hub->ctx0_ptb_addr_lo32 + (2 * vm_id),
+3 −3
Original line number Diff line number Diff line
@@ -395,10 +395,10 @@ static uint64_t gmc_v6_0_get_vm_pte_flags(struct amdgpu_device *adev,
	return pte_flag;
}

static uint64_t gmc_v6_0_get_vm_pde(struct amdgpu_device *adev, uint64_t addr)
static void gmc_v6_0_get_vm_pde(struct amdgpu_device *adev, int level,
				uint64_t *addr, uint64_t *flags)
{
	BUG_ON(addr & 0xFFFFFF0000000FFFULL);
	return addr;
	BUG_ON(*addr & 0xFFFFFF0000000FFFULL);
}

static void gmc_v6_0_set_fault_enable_default(struct amdgpu_device *adev,
+3 −3
Original line number Diff line number Diff line
@@ -480,10 +480,10 @@ static uint64_t gmc_v7_0_get_vm_pte_flags(struct amdgpu_device *adev,
	return pte_flag;
}

static uint64_t gmc_v7_0_get_vm_pde(struct amdgpu_device *adev, uint64_t addr)
static void gmc_v7_0_get_vm_pde(struct amdgpu_device *adev, int level,
				uint64_t *addr, uint64_t *flags)
{
	BUG_ON(addr & 0xFFFFFF0000000FFFULL);
	return addr;
	BUG_ON(*addr & 0xFFFFFF0000000FFFULL);
}

/**
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