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Commit 3d844b35 authored by Jilai Wang's avatar Jilai Wang
Browse files

ARM: dts: msm: Add reset controls for npu clocks 

Some npu clocks such as dpm_tmp_clk/llm_curr_clk/llm_temp_clk need
to work with reset controls in order to work properly.

Change-Id: I301d9fa9d079e3fc41127573cd5cf5f17e2a28b6
parent 3f5d9913

qcom/kona-npu.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -80,6 +80,10 @@ 
		vdd_cx-supply = <&VDD_CX_LEVEL>;

		qcom,proxy-reg-names ="vdd", "vdd_cx";

		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		resets = <&clock_npucc NPU_CC_DPM_TEMP_CLK_ARES>,

				<&clock_npucc NPU_CC_LLM_CURR_CLK_ARES>,

				<&clock_npucc NPU_CC_LLM_TEMP_CLK_ARES>;

		reset-names = "dpm_temp_clk", "llm_curr_clk", "llm_temp_clk";

		#cooling-cells = <2>;

		mboxes = <&ipcc_mproc IPCC_CLIENT_NPU

				IPCC_MPROC_SIGNAL_GLINK_QMP>,

qcom/lito-npu.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -71,6 +71,10 @@ 
		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		mboxes = <&qmp_aop 0>;

		mbox-names = "aop";

		resets = <&npucc NPU_CC_DPM_TEMP_CLK_ARES>,

				<&npucc NPU_CC_LLM_CURR_CLK_ARES>,

				<&npucc NPU_CC_LLM_TEMP_CLK_ARES>;

		reset-names = "dpm_temp_clk", "llm_curr_clk", "llm_temp_clk";

		#cooling-cells = <2>;

		qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>;

		qcom,npu-pwrlevels {