Merge tag 'usb-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

What:		/sys/bus/usb/devices/INTERFACE/authorized

Date:		August 2015

Description:

		This allows to authorize (1) or deauthorize (0)

		individual interfaces instead a whole device

		in contrast to the device authorization.

		If a deauthorized interface will be authorized

		so the driver probing must be triggered manually

		by writing INTERFACE to /sys/bus/usb/drivers_probe

		This allows to avoid side-effects with drivers

		that need multiple interfaces.

		A deauthorized interface cannot be probed or claimed.

What:		/sys/bus/usb/devices/usbX/interface_authorized_default

Date:		August 2015

Description:

		This is used as value that determines if interfaces

		would be authorized by default.

		The value can be 1 or 0. It's by default 1.

What:		/sys/bus/usb/device/.../authorized

What:		/sys/bus/usb/device/.../authorized

Date:		July 2008

Date:		July 2008

KernelVersion:	2.6.26

KernelVersion:	2.6.26

Broadcom Cygnus PCIe PHY

Required properties:

- compatible: must be "brcm,cygnus-pcie-phy"

- reg: base address and length of the PCIe PHY block

- #address-cells: must be 1

- #size-cells: must be 0

Each PCIe PHY should be represented by a child node

Required properties For the child node:

- reg: the PHY ID

0 - PCIe RC 0

1 - PCIe RC 1

- #phy-cells: must be 0

Example:

	pcie_phy: phy@0301d0a0 {

		compatible = "brcm,cygnus-pcie-phy";

		reg = <0x0301d0a0 0x14>;

		pcie0_phy: phy@0 {

			reg = <0>;

			#phy-cells = <0>;

		};

		pcie1_phy: phy@1 {

			reg = <1>;

			#phy-cells = <0>;

		};

	};

	/* users of the PCIe phy */

	pcie0: pcie@18012000 {

		...

		...

		phys = <&pcie0_phy>;

		phy-names = "pcie-phy";

	};

	pcie1: pcie@18013000 {

		...

		...

		phys = <pcie1_phy>;

		phy-names = "pcie-phy";

	};

mt65xx USB3.0 PHY binding

--------------------------

This binding describes a usb3.0 phy for mt65xx platforms of Medaitek SoC.

Required properties (controller (parent) node):

 - compatible	: should be "mediatek,mt8173-u3phy"

 - reg		: offset and length of register for phy, exclude port's

		  register.

 - clocks	: a list of phandle + clock-specifier pairs, one for each

		  entry in clock-names

 - clock-names	: must contain

		  "u3phya_ref": for reference clock of usb3.0 analog phy.

Required nodes	: a sub-node is required for each port the controller

		  provides. Address range information including the usual

		  'reg' property is used inside these nodes to describe

		  the controller's topology.

Required properties (port (child) node):

- reg		: address and length of the register set for the port.

- #phy-cells	: should be 1 (See second example)

		  cell after port phandle is phy type from:

			- PHY_TYPE_USB2

			- PHY_TYPE_USB3

Example:

u3phy: usb-phy@11290000 {

	compatible = "mediatek,mt8173-u3phy";

	reg = <0 0x11290000 0 0x800>;

	clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;

	clock-names = "u3phya_ref";

	#address-cells = <2>;

	#size-cells = <2>;

	ranges;

	status = "okay";

	phy_port0: port@11290800 {

		reg = <0 0x11290800 0 0x800>;

		#phy-cells = <1>;

		status = "okay";

	};

	phy_port1: port@11291000 {

		reg = <0 0x11291000 0 0x800>;

		#phy-cells = <1>;

		status = "okay";

	};

};

Specifying phy control of devices

---------------------------------

Device nodes should specify the configuration required in their "phys"

property, containing a phandle to the phy port node and a device type;

phy-names for each port are optional.

Example:

#include <dt-bindings/phy/phy.h>

usb30: usb@11270000 {

	...

	phys = <&phy_port0 PHY_TYPE_USB3>;

	phy-names = "usb3-0";

	...

};

	- the "ref" clock is used to get the rate of the clock provided to the

	- the "ref" clock is used to get the rate of the clock provided to the

	  PHY module

	  PHY module

Optional properties:

- vbus-supply: power-supply phandle for vbus power source

The first phandle argument in the PHY specifier identifies the PHY, its

The first phandle argument in the PHY specifier identifies the PHY, its

meaning is compatible dependent. For the currently supported SoCs (Exynos 4210

meaning is compatible dependent. For the currently supported SoCs (Exynos 4210

and Exynos 4212) it is as follows:

and Exynos 4212) it is as follows:

- vbus-supply: reference to the VBUS regulator

- vbus-supply: reference to the VBUS regulator

- maximum-speed: limit the maximum connection speed to "full-speed".

- maximum-speed: limit the maximum connection speed to "full-speed".

- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts

- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts

- fsl,usbmisc: (FSL only) phandler of non-core register device, with one

  argument that indicate usb controller index

- disable-over-current: (FSL only) disable over current detect

- external-vbus-divider: (FSL only) enables off-chip resistor divider for Vbus

- itc-setting: interrupt threshold control register control, the setting

- itc-setting: interrupt threshold control register control, the setting

  should be aligned with ITC bits at register USBCMD.

  should be aligned with ITC bits at register USBCMD.

- ahb-burst-config: it is vendor dependent, the required value should be

- ahb-burst-config: it is vendor dependent, the required value should be

- tx-burst-size-dword: it is vendor dependent, the tx burst size in dword

- tx-burst-size-dword: it is vendor dependent, the tx burst size in dword

  (4 bytes), This register represents the maximum length of a the burst

  (4 bytes), This register represents the maximum length of a the burst

  in 32-bit words while moving data from system memory to the USB

  in 32-bit words while moving data from system memory to the USB

  bus, changing this value takes effect only the SBUSCFG.AHBBRST is 0.

  bus, the value of this property will only take effect if property

  "ahb-burst-config" is set to 0, if this property is missing the reset

  default of the hardware implementation will be used.

- rx-burst-size-dword: it is vendor dependent, the rx burst size in dword

- rx-burst-size-dword: it is vendor dependent, the rx burst size in dword

  (4 bytes), This register represents the maximum length of a the burst

  (4 bytes), This register represents the maximum length of a the burst

  in 32-bit words while moving data from the USB bus to system memory,

  in 32-bit words while moving data from the USB bus to system memory,

  changing this value takes effect only the SBUSCFG.AHBBRST is 0.

  the value of this property will only take effect if property

  "ahb-burst-config" is set to 0, if this property is missing the reset

  default of the hardware implementation will be used.

- extcon: phandles to external connector devices. First phandle should point to

  external connector, which provide "USB" cable events, the second should point

  to external connector device, which provide "USB-HOST" cable events. If one

  of the external connector devices is not required, empty <0> phandle should

  be specified.

- phy-clkgate-delay-us: the delay time (us) between putting the PHY into

  low power mode and gating the PHY clock.

i.mx specific properties

- fsl,usbmisc: phandler of non-core register device, with one

  argument that indicate usb controller index

- disable-over-current: disable over current detect

- external-vbus-divider: enables off-chip resistor divider for Vbus

Example:

Example:

		ahb-burst-config = <0x0>;

		ahb-burst-config = <0x0>;

		tx-burst-size-dword = <0x10>; /* 64 bytes */

		tx-burst-size-dword = <0x10>; /* 64 bytes */

		rx-burst-size-dword = <0x10>;

		rx-burst-size-dword = <0x10>;

		extcon = <0>, <&usb_id>;

		phy-clkgate-delay-us = <400>;

	};

	};