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Commit 3d3949df authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'tegra-for-4.12-arm64-dt' of... 

Merge tag 'tegra-for-4.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

arm64: tegra: Device tree changes for v4.12-rc1

This adds a bunch of features for Tegra186, such as PMC, ethernet, I2C,
SDHCI and GPIO. It also enables various features on the P2771 devkit.

A small fix is made to the compatible string list for the flow
controller on Tegra132 and the IOMMU is enabled for host1x on Tegra210.

* tag 'tegra-for-4.12-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  arm64: tegra: Update the Tegra132 flowctrl compatible string
  arm64: tegra: Add GPU node for Tegra186
  arm64: tegra: Enable IOMMU for host1x on Tegra210
  arm64: tegra: Enable VIC on Tegra210
  arm64: tegra: Add GPIO expanders on P2771
  arm64: tegra: Add power monitors on P2771
  arm64: tegra: Add GPIO keys on P2771
  arm64: tegra: Enable current monitors on P3310
  arm64: tegra: Enable SD/MMC slot on P2771
  arm64: tegra: Enable SDHCI controllers on P3110
  arm64: tegra: Add initial power tree for P3310
  arm64: tegra: Enable ethernet on P3310
  arm64: tegra: Enable I2C controllers on P3310
  arm64: tegra: Invert the PMC interrupt on P3310
  arm64: tegra: Add ethernet support for Tegra186
  arm64: tegra: Add PMC controller on Tegra186

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 2149ed8d 18236a14

arch/arm64/boot/dts/nvidia/tegra132.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -224,7 +224,7 @@ 
	};



	flow-controller@60007000 {

		compatible = "nvidia,tegra124-flowctrl";

		compatible = "nvidia,tegra132-flowctrl", "nvidia,tegra124-flowctrl";

		reg = <0x0 0x60007000 0x0 0x1000>;

	};

arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts

+91 −0
Original line number Diff line number Diff line 
/dts-v1/;



#include <dt-bindings/input/linux-event-codes.h>



#include "tegra186-p3310.dtsi"



/ {

	model = "NVIDIA Tegra186 P2771-0000 Development Board";

	compatible = "nvidia,p2771-0000", "nvidia,tegra186";



	i2c@3160000 {

		power-monitor@42 {

			compatible = "ti,ina3221";

			reg = <0x42>;

		};



		power-monitor@43 {

			compatible = "ti,ina3221";

			reg = <0x43>;

		};



		exp1: gpio@74 {

			compatible = "ti,tca9539";

			reg = <0x74>;



			interrupt-parent = <&gpio>;

			interrupts = <TEGRA_MAIN_GPIO(Y, 0) GPIO_ACTIVE_LOW>;



			#gpio-cells = <2>;

			gpio-controller;

		};



		exp2: gpio@77 {

			compatible = "ti,tca9539";

			reg = <0x77>;



			interrupt-parent = <&gpio>;

			interrupts = <TEGRA_MAIN_GPIO(Y, 6) GPIO_ACTIVE_LOW>;



			#gpio-cells = <2>;

			gpio-controller;

		};

	};



	/* SDMMC1 (SD/MMC) */

	sdhci@3400000 {

		status = "okay";



		vmmc-supply = <&vdd_sd>;

	};



	gpio-keys {

		compatible = "gpio-keys";



		power {

			label = "Power";

			gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 0)

					   GPIO_ACTIVE_LOW>;

			linux,input-type = <EV_KEY>;

			linux,code = <KEY_POWER>;

			debounce-interval = <10>;

			wakeup-source;

		};



		volume-up {

			label = "Volume Up";

			gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 1)

					   GPIO_ACTIVE_LOW>;

			linux,input-type = <EV_KEY>;

			linux,code = <KEY_VOLUMEUP>;

			debounce-interval = <10>;

		};



		volume-down {

			label = "Volume Down";

			gpios = <&gpio_aon TEGRA_AON_GPIO(FF, 2)

					   GPIO_ACTIVE_LOW>;

			linux,input-type = <EV_KEY>;

			linux,code = <KEY_VOLUMEDOWN>;

			debounce-interval = <10>;

		};

	};



	regulators {

		vdd_sd: regulator@100 {

			compatible = "regulator-fixed";

			reg = <100>;



			regulator-name = "SD_CARD_SW_PWR";

			regulator-min-microvolt = <3300000>;

			regulator-max-microvolt = <3300000>;



			gpio = <&gpio TEGRA_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;

			enable-active-high;



			vin-supply = <&vdd_3v3_sys>;

		};

	};

};

arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi

+318 −1
Original line number Diff line number Diff line 
#include "tegra186.dtsi"



#include <dt-bindings/mfd/max77620.h>



/ {

	model = "NVIDIA Tegra186 P3310 Processor Module";

	compatible = "nvidia,p3310", "nvidia,tegra186";



	aliases {

		sdhci0 = "/sdhci@3460000";

		sdhci1 = "/sdhci@3400000";

		serial0 = &uarta;

		i2c0 = "/bpmp/i2c";

		i2c1 = "/i2c@3160000";

		i2c2 = "/i2c@c240000";

		i2c3 = "/i2c@3180000";

		i2c4 = "/i2c@3190000";

		i2c5 = "/i2c@31c0000";

		i2c6 = "/i2c@c250000";

		i2c7 = "/i2c@31e0000";

	};



	chosen {
@@ -18,14 +30,99 @@ 
		reg = <0x0 0x80000000 0x2 0x00000000>;

	};



	ethernet@2490000 {

		status = "okay";



		phy-reset-gpios = <&gpio TEGRA_MAIN_GPIO(M, 4) GPIO_ACTIVE_LOW>;

		phy-handle = <&phy>;

		phy-mode = "rgmii";



		mdio {

			#address-cells = <1>;

			#size-cells = <0>;



			phy: phy@0 {

				compatible = "ethernet-phy-ieee802.3-c22";

				reg = <0x0>;

				interrupt-parent = <&gpio>;

				interrupts = <TEGRA_MAIN_GPIO(M, 5) IRQ_TYPE_LEVEL_HIGH>;

			};

		};

	};



	serial@3100000 {

		status = "okay";

	};



	i2c@3160000 {

		status = "okay";



		power-monitor@40 {

			compatible = "ti,ina3221";

			reg = <0x40>;

		};



		power-monitor@41 {

			compatible = "ti,ina3221";

			reg = <0x41>;

		};

	};



	i2c@3180000 {

		status = "okay";

	};



	i2c@3190000 {

		status = "okay";

	};



	i2c@31c0000 {

		status = "okay";

	};



	i2c@31e0000 {

		status = "okay";

	};



	/* SDMMC1 (SD/MMC) */

	sdhci@3400000 {

		cd-gpios = <&gpio TEGRA_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;

		wp-gpios = <&gpio TEGRA_MAIN_GPIO(P, 4) GPIO_ACTIVE_LOW>;



		vqmmc-supply = <&vddio_sdmmc1>;

	};



	/* SDMMC3 (SDIO) */

	sdhci@3440000 {

		status = "okay";

	};



	/* SDMMC4 (eMMC) */

	sdhci@3460000 {

		status = "okay";

		bus-width = <8>;

		non-removable;



		vqmmc-supply = <&vdd_1v8_ap>;

		vmmc-supply = <&vdd_3v3_sys>;

	};



	hsp@3c00000 {

		status = "okay";

	};



	i2c@c240000 {

		status = "okay";

	};



	i2c@c250000 {

		status = "okay";

	};



	pmc@c360000 {

		nvidia,invert-interrupt;

	};



	cpus {

		cpu@0 {

			enable-method = "psci";
@@ -53,7 +150,192 @@ 
	};



	bpmp {

		i2c {

			status = "okay";



			pmic: pmic@3c {

				compatible = "maxim,max77620";

				reg = <0x3c>;



				interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;

				#interrupt-cells = <2>;

				interrupt-controller;



				#gpio-cells = <2>;

				gpio-controller;



				pinctrl-names = "default";

				pinctrl-0 = <&max77620_default>;



				max77620_default: pinmux {

					gpio0 {

						pins = "gpio0";

						function = "gpio";

					};



					gpio1 {

						pins = "gpio1";

						function = "fps-out";

						maxim,active-fps-source = <MAX77620_FPS_SRC_0>;

					};



					gpio2 {

						pins = "gpio2";

						function = "fps-out";

						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;

					};



					gpio3 {

						pins = "gpio3";

						function = "fps-out";

						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;

					};



					gpio4 {

						pins = "gpio4";

						function = "32k-out1";

						drive-push-pull = <1>;

					};



					gpio5 {

						pins = "gpio5";

						function = "gpio";

						drive-push-pull = <0>;

					};



					gpio6 {

						pins = "gpio6";

						function = "gpio";

						drive-push-pull = <1>;

					};



					gpio7 {

						pins = "gpio7";

						function = "gpio";

						drive-push-pull = <0>;

					};

				};



				fps {

					fps0 {

						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;

						maxim,shutdown-fps-time-period-us = <640>;

					};



					fps1 {

						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;

						maxim,shutdown-fps-time-period-us = <640>;

					};



					fps2 {

						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;

						maxim,shutdown-fps-time-period-us = <640>;

					};

				};



				regulators {

					in-sd0-supply = <&vdd_5v0_sys>;

					in-sd1-supply = <&vdd_5v0_sys>;

					in-sd2-supply = <&vdd_5v0_sys>;

					in-sd3-supply = <&vdd_5v0_sys>;



					in-ldo0-1-supply = <&vdd_5v0_sys>;

					in-ldo2-supply = <&vdd_5v0_sys>;

					in-ldo3-5-supply = <&vdd_5v0_sys>;

					in-ldo4-6-supply = <&vdd_1v8>;

					in-ldo7-8-supply = <&avdd_dsi_csi>;



					sd0 {

						regulator-name = "VDD_DDR_1V1_PMIC";

						regulator-min-microvolt = <1100000>;

						regulator-max-microvolt = <1100000>;

						regulator-always-on;

						regulator-boot-on;

					};



					avdd_dsi_csi: sd1 {

						regulator-name = "AVDD_DSI_CSI_1V2";

						regulator-min-microvolt = <1200000>;

						regulator-max-microvolt = <1200000>;

						/* XXX */

						regulator-always-on;

						regulator-boot-on;

					};



					vdd_1v8: sd2 {

						regulator-name = "VDD_1V8";

						regulator-min-microvolt = <1800000>;

						regulator-max-microvolt = <1800000>;

						/* XXX */

						regulator-always-on;

						regulator-boot-on;

					};



					vdd_3v3_sys: sd3 {

						regulator-name = "VDD_3V3_SYS";

						regulator-min-microvolt = <3300000>;

						regulator-max-microvolt = <3300000>;

						/* XXX */

						regulator-always-on;

						regulator-boot-on;

					};



					ldo0 {

						regulator-name = "VDD_1V8_AP_PLL";

						regulator-min-microvolt = <1800000>;

						regulator-max-microvolt = <1800000>;

						/* XXX */

						regulator-always-on;

						regulator-boot-on;

					};



					ldo2 {

						regulator-name = "VDDIO_3V3_AOHV";

						regulator-min-microvolt = <3300000>;

						regulator-max-microvolt = <3300000>;

						/* XXX */

						regulator-always-on;

						regulator-boot-on;

					};



					vddio_sdmmc1: ldo3 {

						regulator-name = "VDDIO_SDMMC1_AP";

						regulator-min-microvolt = <1800000>;

						regulator-max-microvolt = <3300000>;

					};



					ldo4 {

						regulator-name = "VDD_RTC";

						regulator-min-microvolt = <1000000>;

						regulator-max-microvolt = <1000000>;

					};



					vddio_sdmmc3: ldo5 {

						regulator-name = "VDDIO_SDMMC3_AP";

						regulator-min-microvolt = <2800000>;

						regulator-max-microvolt = <2800000>;

					};



					avdd_1v05: ldo7 {

						regulator-name = "VDD_HDMI_1V05";

						regulator-min-microvolt = <1050000>;

						regulator-max-microvolt = <1050000>;

						/* XXX */

						regulator-always-on;

						regulator-boot-on;

					};



					vdd_pex: ldo8 {

						regulator-name = "VDD_PEX_1V05";

						regulator-min-microvolt = <1050000>;

						regulator-max-microvolt = <1050000>;

						/* XXX */

						regulator-always-on;

						regulator-boot-on;

					};

				};

			};

		};

	};



	psci {
@@ -61,4 +343,39 @@ 
		status = "okay";

		method = "smc";

	};



	regulators {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		vdd_5v0_sys: regulator@0 {

			compatible = "regulator-fixed";

			reg = <0>;



			regulator-name = "VDD_5V0_SYS";

			regulator-min-microvolt = <5000000>;

			regulator-max-microvolt = <5000000>;

			regulator-always-on;

			regulator-boot-on;

		};



		vdd_1v8_ap: regulator@1 {

			compatible = "regulator-fixed";

			reg = <1>;



			regulator-name = "VDD_1V8_AP";

			regulator-min-microvolt = <1800000>;

			regulator-max-microvolt = <1800000>;



			/* XXX */

			regulator-always-on;

			regulator-boot-on;



			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;

			enable-active-high;



			vin-supply = <&vdd_1v8>;

		};

	};

};

arch/arm64/boot/dts/nvidia/tegra186.dtsi

+59 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
#include <dt-bindings/gpio/tegra186-gpio.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/mailbox/tegra186-hsp.h>

#include <dt-bindings/power/tegra186-powergate.h>

#include <dt-bindings/reset/tegra186-reset.h>



/ {
@@ -27,6 +28,37 @@ 
		gpio-controller;

	};



	ethernet@2490000 {

		compatible = "nvidia,tegra186-eqos",

			     "snps,dwc-qos-ethernet-4.10";

		reg = <0x0 0x02490000 0x0 0x10000>;

		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>, /* common */

			     <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>, /* power */

			     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, /* rx0 */

			     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, /* tx0 */

			     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, /* rx1 */

			     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, /* tx1 */

			     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, /* rx2 */

			     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* tx2 */

			     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>, /* rx3 */

			     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; /* tx3 */

		clocks = <&bpmp TEGRA186_CLK_AXI_CBB>,

			 <&bpmp TEGRA186_CLK_EQOS_AXI>,

			 <&bpmp TEGRA186_CLK_EQOS_RX>,

			 <&bpmp TEGRA186_CLK_EQOS_TX>,

			 <&bpmp TEGRA186_CLK_EQOS_PTP_REF>;

		clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";

		resets = <&bpmp TEGRA186_RESET_EQOS>;

		reset-names = "eqos";

		status = "disabled";



		snps,write-requests = <1>;

		snps,read-requests = <3>;

		snps,burst-map = <0x7>;

		snps,txpbl = <32>;

		snps,rxpbl = <8>;

	};



	uarta: serial@3100000 {

		compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";

		reg = <0x0 0x03100000 0x0 0x40>;
@@ -307,6 +339,33 @@ 
		#interrupt-cells = <2>;

	};



	pmc@c360000 {

		compatible = "nvidia,tegra186-pmc";

		reg = <0 0x0c360000 0 0x10000>,

		      <0 0x0c370000 0 0x10000>,

		      <0 0x0c380000 0 0x10000>,

		      <0 0x0c390000 0 0x10000>;

		reg-names = "pmc", "wake", "aotag", "scratch";

	};



	gpu@17000000 {

		compatible = "nvidia,gp10b";

		reg = <0x0 0x17000000 0x0 0x1000000>,

		      <0x0 0x18000000 0x0 0x1000000>;

		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH

			      GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "stall", "nonstall";



		clocks = <&bpmp TEGRA186_CLK_GPCCLK>,

			 <&bpmp TEGRA186_CLK_GPU>;

		clock-names = "gpu", "pwr";

		resets = <&bpmp TEGRA186_RESET_GPU>;

		reset-names = "gpu";

		status = "disabled";



		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;

	};



	sysram@30000000 {

		compatible = "nvidia,tegra186-sysram", "mmio-sram";

		reg = <0x0 0x30000000 0x0 0x50000>;

arch/arm64/boot/dts/nvidia/tegra210.dtsi

+18 −1
Original line number Diff line number Diff line
@@ -89,6 +89,8 @@ 


		ranges = <0x0 0x54000000 0x0 0x54000000 0x0 0x01000000>;



		iommus = <&mc TEGRA_SWGROUP_HC>;



		dpaux1: dpaux@54040000 {

			compatible = "nvidia,tegra210-dpaux";

			reg = <0x0 0x54040000 0x0 0x00040000>;
@@ -185,7 +187,14 @@ 
		vic@54340000 {

			compatible = "nvidia,tegra210-vic";

			reg = <0x0 0x54340000 0x0 0x00040000>;

			status = "disabled";

			interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&tegra_car TEGRA210_CLK_VIC03>;

			clock-names = "vic";

			resets = <&tegra_car 178>;

			reset-names = "vic";



			iommus = <&mc TEGRA_SWGROUP_VIC>;

			power-domains = <&pd_vic>;

		};



		nvjpg@54380000 {
@@ -755,6 +764,14 @@ 
				resets = <&tegra_car TEGRA210_CLK_XUSB_HOST>;

				#power-domain-cells = <0>;

			};



			pd_vic: vic {

				clocks = <&tegra_car TEGRA210_CLK_VIC03>;

				clock-names = "vic";

				resets = <&tegra_car 178>;

				reset-names = "vic";

				#power-domain-cells = <0>;

			};

		};

	};