Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3c865dd9 authored by James Hogan's avatar James Hogan Committed by Ralf Baechle
Browse files

MIPS: Refactor dumping of TLB registers for r3k/r4k 



The TLB registers are dumped in a couble of places:
 - sysrq_tlbdump_single() - when dumping TLB state.
 - do_mcheck() - in response to a machine check error.

The main TLB registers also differ between r3k and r4k, but r4k appears
to be assumed.

Refactor this code into a dump_tlb_regs() function, implemented for both
r3k and r4k, and used by both of the above functions.

Fixes: d1e9a4f5 ("MIPS: Add SysRq operation to dump TLBs on all CPUs")
Suggested-by: default avatarMaciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10721/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 0f6ce775

arch/mips/include/asm/tlbdebug.h

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
/*

 * TLB debugging functions:

 */

extern void dump_tlb_regs(void);

extern void dump_tlb_all(void);



#endif /* __ASM_TLBDEBUG_H */

arch/mips/kernel/sysrq.c

+1 −13
Original line number Diff line number Diff line
@@ -21,24 +21,12 @@ static DEFINE_SPINLOCK(show_lock); 


static void sysrq_tlbdump_single(void *dummy)

{

	const int field = 2 * sizeof(unsigned long);

	unsigned long flags;



	spin_lock_irqsave(&show_lock, flags);



	pr_info("CPU%d:\n", smp_processor_id());

	pr_info("Index	: %0x\n", read_c0_index());

	pr_info("Pagemask: %0x\n", read_c0_pagemask());

	pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi());

	pr_info("EntryLo0: %0*lx\n", field, read_c0_entrylo0());

	pr_info("EntryLo1: %0*lx\n", field, read_c0_entrylo1());

	pr_info("Wired   : %0x\n", read_c0_wired());

	pr_info("Pagegrain: %0x\n", read_c0_pagegrain());

	if (cpu_has_htw) {

		pr_info("PWField : %0*lx\n", field, read_c0_pwfield());

		pr_info("PWSize  : %0*lx\n", field, read_c0_pwsize());

		pr_info("PWCtl   : %0x\n", read_c0_pwctl());

	}

	dump_tlb_regs();

	pr_info("\n");

	dump_tlb_all();

	pr_info("\n");

arch/mips/kernel/traps.c

+2 −14
Original line number Diff line number Diff line
@@ -1523,7 +1523,6 @@ asmlinkage void do_watch(struct pt_regs *regs) 


asmlinkage void do_mcheck(struct pt_regs *regs)

{

	const int field = 2 * sizeof(unsigned long);

	int multi_match = regs->cp0_status & ST0_TS;

	enum ctx_state prev_state;

	mm_segment_t old_fs = get_fs();
@@ -1532,19 +1531,8 @@ asmlinkage void do_mcheck(struct pt_regs *regs) 
	show_regs(regs);



	if (multi_match) {

		pr_err("Index	: %0x\n", read_c0_index());

		pr_err("Pagemask: %0x\n", read_c0_pagemask());

		pr_err("EntryHi : %0*lx\n", field, read_c0_entryhi());

		pr_err("EntryLo0: %0*lx\n", field, read_c0_entrylo0());

		pr_err("EntryLo1: %0*lx\n", field, read_c0_entrylo1());

		pr_err("Wired   : %0x\n", read_c0_wired());

		pr_err("Pagegrain: %0x\n", read_c0_pagegrain());

		if (cpu_has_htw) {

			pr_err("PWField : %0*lx\n", field, read_c0_pwfield());

			pr_err("PWSize  : %0*lx\n", field, read_c0_pwsize());

			pr_err("PWCtl   : %0x\n", read_c0_pwctl());

		}

		pr_err("\n");

		dump_tlb_regs();

		pr_info("\n");

		dump_tlb_all();

	}

arch/mips/lib/dump_tlb.c

+18 −0
Original line number Diff line number Diff line
@@ -13,6 +13,24 @@ 
#include <asm/pgtable.h>

#include <asm/tlbdebug.h>



void dump_tlb_regs(void)

{

	const int field = 2 * sizeof(unsigned long);



	pr_info("Index    : %0x\n", read_c0_index());

	pr_info("PageMask : %0x\n", read_c0_pagemask());

	pr_info("EntryHi  : %0*lx\n", field, read_c0_entryhi());

	pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());

	pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());

	pr_info("Wired    : %0x\n", read_c0_wired());

	pr_info("PageGrain: %0x\n", read_c0_pagegrain());

	if (cpu_has_htw) {

		pr_info("PWField  : %0*lx\n", field, read_c0_pwfield());

		pr_info("PWSize   : %0*lx\n", field, read_c0_pwsize());

		pr_info("PWCtl    : %0x\n", read_c0_pwctl());

	}

}



static inline const char *msk2str(unsigned int mask)

{

	switch (mask) {

arch/mips/lib/r3k_dump_tlb.c

+11 −0
Original line number Diff line number Diff line
@@ -14,6 +14,17 @@ 
#include <asm/pgtable.h>

#include <asm/tlbdebug.h>



extern int r3k_have_wired_reg;



void dump_tlb_regs(void)

{

	pr_info("Index    : %0x\n", read_c0_index());

	pr_info("EntryHi  : %0lx\n", read_c0_entryhi());

	pr_info("EntryLo  : %0lx\n", read_c0_entrylo0());

	if (r3k_have_wired_reg)

		pr_info("Wired    : %0x\n", read_c0_wired());

}



static void dump_tlb(int first, int last)

{

	int	i;