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Commit 3b704647 authored by Harshdeep Dhatt's avatar Harshdeep Dhatt
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ARM: dts: msm: Add bus dcvs tuning parameter to kona gpu 

This is an alternate approach to using floating watermark approach
for gpu bus dcvs.

Change-Id: Ieded1ff369dc2af4f549b18c3cb7c3edc456244c
parent 618d7995

bindings/gpu/adreno.txt

+3 −0
Original line number Diff line number Diff line
@@ -96,6 +96,9 @@ Optional Properties: 
- qcom,bus-control:	   Boolean. Enables an independent bus vote from the gpu frequency

- qcom,bus-width:	   Bus width in number of bytes. This enables dynamic AB bus voting based on

			   bus width and actual bus transactions.

- qcom,bus-accesses:       Parameter for tuning bus dcvs.

- qcom,bus-accesses-ddrX:  Parameter for tuning bus dcvs for each DDR configuration where

                           X will be the return value from of_fdt_get_ddrtype().

- qcom,gpubw-dev:	   a phandle to a device representing bus bandwidth requirements

			   (see devdw.txt)

- qcom,idle-timeout:	   This property represents the time in milliseconds for idle timeout.

qcom/kona-gpu.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -102,6 +102,9 @@ 
		/* GPU OPP data */

		operating-points-v2 = <&gpu_opp_table>;



		qcom,bus-accesses-ddr7 = <970>;

		qcom,bus-accesses-ddr8 = <1162>;



		/* bus table */

		qcom,gpu-bus-table-0 {

			compatible = "qcom,gpu-bus-table",