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Commit 3b63ca75 authored by Tomi Valkeinen's avatar Tomi Valkeinen
Browse files

drm/omap: rename dss_clk_source enums 



The names of the enum dss_clk_source's values are legacy names, only
correct for OMAP3 DSS. Rename the names to more generic ones.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent 407bd564

drivers/gpu/drm/omapdrm/dss/dispc.c

+6 −6
Original line number Diff line number Diff line
@@ -3303,17 +3303,17 @@ static unsigned long dispc_fclk_rate(void) 
	unsigned long r = 0;



	switch (dss_get_dispc_clk_source()) {

	case OMAP_DSS_CLK_SRC_FCK:

	case DSS_CLK_SRC_FCK:

		r = dss_get_dispc_clk_rate();

		break;

	case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:

	case DSS_CLK_SRC_PLL1_1:

		pll = dss_pll_find("dsi0");

		if (!pll)

			pll = dss_pll_find("video0");



		r = pll->cinfo.clkout[0];

		break;

	case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:

	case DSS_CLK_SRC_PLL2_1:

		pll = dss_pll_find("dsi1");

		if (!pll)

			pll = dss_pll_find("video1");
@@ -3341,17 +3341,17 @@ static unsigned long dispc_mgr_lclk_rate(enum omap_channel channel) 
		lcd = FLD_GET(l, 23, 16);



		switch (dss_get_lcd_clk_source(channel)) {

		case OMAP_DSS_CLK_SRC_FCK:

		case DSS_CLK_SRC_FCK:

			r = dss_get_dispc_clk_rate();

			break;

		case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:

		case DSS_CLK_SRC_PLL1_1:

			pll = dss_pll_find("dsi0");

			if (!pll)

				pll = dss_pll_find("video0");



			r = pll->cinfo.clkout[0];

			break;

		case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:

		case DSS_CLK_SRC_PLL2_1:

			pll = dss_pll_find("dsi1");

			if (!pll)

				pll = dss_pll_find("video1");

drivers/gpu/drm/omapdrm/dss/dpi.c

+5 −5
Original line number Diff line number Diff line
@@ -127,15 +127,15 @@ static enum dss_clk_source dpi_get_alt_clk_src(enum omap_channel channel) 
{

	switch (channel) {

	case OMAP_DSS_CHANNEL_LCD:

		return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC;

		return DSS_CLK_SRC_PLL1_1;

	case OMAP_DSS_CHANNEL_LCD2:

		return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;

		return DSS_CLK_SRC_PLL2_1;

	case OMAP_DSS_CHANNEL_LCD3:

		return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC;

		return DSS_CLK_SRC_PLL2_1;

	default:

		/* this shouldn't happen */

		WARN_ON(1);

		return OMAP_DSS_CLK_SRC_FCK;

		return DSS_CLK_SRC_FCK;

	}

}
@@ -465,7 +465,7 @@ static void dpi_display_disable(struct omap_dss_device *dssdev) 
	dss_mgr_disable(channel);



	if (dpi->pll) {

		dss_select_lcd_clk_source(channel, OMAP_DSS_CLK_SRC_FCK);

		dss_select_lcd_clk_source(channel, DSS_CLK_SRC_FCK);

		dss_pll_disable(dpi->pll);

	}

drivers/gpu/drm/omapdrm/dss/dsi.c

+15 −15
Original line number Diff line number Diff line
@@ -1271,7 +1271,7 @@ static unsigned long dsi_fclk_rate(struct platform_device *dsidev) 
	unsigned long r;

	struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);



	if (dss_get_dsi_clk_source(dsi->module_id) == OMAP_DSS_CLK_SRC_FCK) {

	if (dss_get_dsi_clk_source(dsi->module_id) == DSS_CLK_SRC_FCK) {

		/* DSI FCLK source is DSS_CLK_FCK */

		r = clk_get_rate(dsi->dss_clk);

	} else {
@@ -1505,20 +1505,20 @@ static void dsi_dump_dsidev_clocks(struct platform_device *dsidev, 


	seq_printf(s,	"DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n",

			dss_get_clk_source_name(dsi_module == 0 ?

				OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC :

				OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC),

				DSS_CLK_SRC_PLL1_1 :

				DSS_CLK_SRC_PLL2_1),

			cinfo->clkout[HSDIV_DISPC],

			cinfo->mX[HSDIV_DISPC],

			dispc_clk_src == OMAP_DSS_CLK_SRC_FCK ?

			dispc_clk_src == DSS_CLK_SRC_FCK ?

			"off" : "on");



	seq_printf(s,	"DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n",

			dss_get_clk_source_name(dsi_module == 0 ?

				OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI :

				OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI),

				DSS_CLK_SRC_PLL1_2 :

				DSS_CLK_SRC_PLL2_2),

			cinfo->clkout[HSDIV_DSI],

			cinfo->mX[HSDIV_DSI],

			dsi_clk_src == OMAP_DSS_CLK_SRC_FCK ?

			dsi_clk_src == DSS_CLK_SRC_FCK ?

			"off" : "on");



	seq_printf(s,	"- DSI%d -\n", dsi_module + 1);
@@ -4110,8 +4110,8 @@ static int dsi_display_init_dispc(struct platform_device *dsidev, 
	int r;



	dss_select_lcd_clk_source(channel, dsi->module_id == 0 ?

			OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC :

			OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC);

			DSS_CLK_SRC_PLL1_1 :

			DSS_CLK_SRC_PLL2_1);



	if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) {

		r = dss_mgr_register_framedone_handler(channel,
@@ -4158,7 +4158,7 @@ static int dsi_display_init_dispc(struct platform_device *dsidev, 
		dss_mgr_unregister_framedone_handler(channel,

				dsi_framedone_irq_callback, dsidev);

err:

	dss_select_lcd_clk_source(channel, OMAP_DSS_CLK_SRC_FCK);

	dss_select_lcd_clk_source(channel, DSS_CLK_SRC_FCK);

	return r;

}
@@ -4171,7 +4171,7 @@ static void dsi_display_uninit_dispc(struct platform_device *dsidev, 
		dss_mgr_unregister_framedone_handler(channel,

				dsi_framedone_irq_callback, dsidev);



	dss_select_lcd_clk_source(channel, OMAP_DSS_CLK_SRC_FCK);

	dss_select_lcd_clk_source(channel, DSS_CLK_SRC_FCK);

}



static int dsi_configure_dsi_clocks(struct platform_device *dsidev)
@@ -4205,8 +4205,8 @@ static int dsi_display_init_dsi(struct platform_device *dsidev) 
		goto err1;



	dss_select_dsi_clk_source(dsi->module_id, dsi->module_id == 0 ?

			OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI :

			OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI);

			DSS_CLK_SRC_PLL1_2 :

			DSS_CLK_SRC_PLL2_2);



	DSSDBG("PLL OK\n");
@@ -4238,7 +4238,7 @@ static int dsi_display_init_dsi(struct platform_device *dsidev) 
err3:

	dsi_cio_uninit(dsidev);

err2:

	dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK);

	dss_select_dsi_clk_source(dsi->module_id, DSS_CLK_SRC_FCK);

err1:

	dss_pll_disable(&dsi->pll);

err0:
@@ -4260,7 +4260,7 @@ static void dsi_display_uninit_dsi(struct platform_device *dsidev, 
	dsi_vc_enable(dsidev, 2, 0);

	dsi_vc_enable(dsidev, 3, 0);



	dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK);

	dss_select_dsi_clk_source(dsi->module_id, DSS_CLK_SRC_FCK);

	dsi_cio_uninit(dsidev);

	dsi_pll_uninit(dsidev, disconnect_lanes);

}

drivers/gpu/drm/omapdrm/dss/dss.c

+21 −21
Original line number Diff line number Diff line
@@ -105,11 +105,11 @@ static struct { 
} dss;



static const char * const dss_generic_clk_source_names[] = {

	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]	= "DSI_PLL_HSDIV_DISPC",

	[OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]	= "DSI_PLL_HSDIV_DSI",

	[OMAP_DSS_CLK_SRC_FCK]			= "DSS_FCK",

	[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC]	= "DSI_PLL2_HSDIV_DISPC",

	[OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]	= "DSI_PLL2_HSDIV_DSI",

	[DSS_CLK_SRC_FCK]	= "FCK",

	[DSS_CLK_SRC_PLL1_1]	= "PLL1:1",

	[DSS_CLK_SRC_PLL1_2]	= "PLL1:2",

	[DSS_CLK_SRC_PLL2_1]	= "PLL2:1",

	[DSS_CLK_SRC_PLL2_2]	= "PLL2:2",

};



static bool dss_initialized;
@@ -368,7 +368,7 @@ void dss_dump_clocks(struct seq_file *s) 


	seq_printf(s, "- DSS -\n");



	fclk_name = dss_get_clk_source_name(OMAP_DSS_CLK_SRC_FCK);

	fclk_name = dss_get_clk_source_name(DSS_CLK_SRC_FCK);

	fclk_rate = clk_get_rate(dss.dss_clk);



	seq_printf(s, "%s = %lu\n",
@@ -407,13 +407,13 @@ static void dss_select_dispc_clk_source(enum dss_clk_source clk_src) 
	u8 start, end;



	switch (clk_src) {

	case OMAP_DSS_CLK_SRC_FCK:

	case DSS_CLK_SRC_FCK:

		b = 0;

		break;

	case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:

	case DSS_CLK_SRC_PLL1_1:

		b = 1;

		break;

	case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:

	case DSS_CLK_SRC_PLL2_1:

		b = 2;

		break;

	default:
@@ -434,14 +434,14 @@ void dss_select_dsi_clk_source(int dsi_module, 
	int b, pos;



	switch (clk_src) {

	case OMAP_DSS_CLK_SRC_FCK:

	case DSS_CLK_SRC_FCK:

		b = 0;

		break;

	case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI:

	case DSS_CLK_SRC_PLL1_2:

		BUG_ON(dsi_module != 0);

		b = 1;

		break;

	case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI:

	case DSS_CLK_SRC_PLL2_2:

		BUG_ON(dsi_module != 1);

		b = 1;

		break;
@@ -467,14 +467,14 @@ void dss_select_lcd_clk_source(enum omap_channel channel, 
	}



	switch (clk_src) {

	case OMAP_DSS_CLK_SRC_FCK:

	case DSS_CLK_SRC_FCK:

		b = 0;

		break;

	case OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC:

	case DSS_CLK_SRC_PLL1_1:

		BUG_ON(channel != OMAP_DSS_CHANNEL_LCD);

		b = 1;

		break;

	case OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC:

	case DSS_CLK_SRC_PLL2_1:

		BUG_ON(channel != OMAP_DSS_CHANNEL_LCD2 &&

		       channel != OMAP_DSS_CHANNEL_LCD3);

		b = 1;
@@ -1141,18 +1141,18 @@ static int dss_bind(struct device *dev) 
	/* Select DPLL */

	REG_FLD_MOD(DSS_CONTROL, 0, 0, 0);



	dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);

	dss_select_dispc_clk_source(DSS_CLK_SRC_FCK);



#ifdef CONFIG_OMAP2_DSS_VENC

	REG_FLD_MOD(DSS_CONTROL, 1, 4, 4);	/* venc dac demen */

	REG_FLD_MOD(DSS_CONTROL, 1, 3, 3);	/* venc clock 4x enable */

	REG_FLD_MOD(DSS_CONTROL, 0, 2, 2);	/* venc clock mode = normal */

#endif

	dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;

	dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;

	dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK;

	dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;

	dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;

	dss.dsi_clk_source[0] = DSS_CLK_SRC_FCK;

	dss.dsi_clk_source[1] = DSS_CLK_SRC_FCK;

	dss.dispc_clk_source = DSS_CLK_SRC_FCK;

	dss.lcd_clk_source[0] = DSS_CLK_SRC_FCK;

	dss.lcd_clk_source[1] = DSS_CLK_SRC_FCK;



	rev = dss_read_reg(DSS_REVISION);

	printk(KERN_INFO "OMAP DSS rev %d.%d\n",

drivers/gpu/drm/omapdrm/dss/dss.h

+7 −8
Original line number Diff line number Diff line
@@ -103,14 +103,13 @@ enum dss_writeback_channel { 
};



enum dss_clk_source {

	OMAP_DSS_CLK_SRC_FCK = 0,		/* OMAP2/3: DSS1_ALWON_FCLK

						 * OMAP4: DSS_FCLK */

	OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC,	/* OMAP3: DSI1_PLL_FCLK

						 * OMAP4: PLL1_CLK1 */

	OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI,	/* OMAP3: DSI2_PLL_FCLK

						 * OMAP4: PLL1_CLK2 */

	OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC,	/* OMAP4: PLL2_CLK1 */

	OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI,	/* OMAP4: PLL2_CLK2 */

	DSS_CLK_SRC_FCK = 0,



	DSS_CLK_SRC_PLL1_1,

	DSS_CLK_SRC_PLL1_2,



	DSS_CLK_SRC_PLL2_1,

	DSS_CLK_SRC_PLL2_2,

};



enum dss_pll_id {