Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3b4c2511 authored by Neha Bhende's avatar Neha Bhende Committed by Thomas Hellstrom
Browse files

drm/vmwgfx: Add CAP2 support in vmwgfx 



The device exposes a new capability register. Add support for it.

Signed-off-by: default avatarNeha Bhende <bhenden@vmware.com>
Reviewed-by: default avatarThomas Hellstrom <thellstrom@vmware.com>
Signed-off-by: default avatarThomas Hellstrom <thellstrom@vmware.com>
parent dc75e733

drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

+17 −0
Original line number Original line Diff line number Diff line
@@ -258,6 +258,15 @@ MODULE_PARM_DESC(assume_16bpp, "Assume 16-bpp when filtering modes"); 
module_param_named(assume_16bpp, vmw_assume_16bpp, int, 0600);

module_param_named(assume_16bpp, vmw_assume_16bpp, int, 0600);









static void vmw_print_capabilities2(uint32_t capabilities2)

{

	DRM_INFO("Capabilities2:\n");

	if (capabilities2 & SVGA_CAP2_GROW_OTABLE)

		DRM_INFO("  Grow oTable.\n");

	if (capabilities2 & SVGA_CAP2_INTRA_SURFACE_COPY)

		DRM_INFO("  IntraSurface copy.\n");

}



static void vmw_print_capabilities(uint32_t capabilities)

static void vmw_print_capabilities(uint32_t capabilities)

{

{

	DRM_INFO("Capabilities:\n");

	DRM_INFO("Capabilities:\n");
@@ -684,6 +693,12 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) 
	}

	}





	dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);

	dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);



	if (dev_priv->capabilities & SVGA_CAP_CAP2_REGISTER) {

		dev_priv->capabilities2 = vmw_read(dev_priv, SVGA_REG_CAP2);

	}





	ret = vmw_dma_select_mode(dev_priv);

	ret = vmw_dma_select_mode(dev_priv);

	if (unlikely(ret != 0)) {

	if (unlikely(ret != 0)) {

		DRM_INFO("Restricting capabilities due to IOMMU setup.\n");

		DRM_INFO("Restricting capabilities due to IOMMU setup.\n");
@@ -752,6 +767,8 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) 
	}

	}





	vmw_print_capabilities(dev_priv->capabilities);

	vmw_print_capabilities(dev_priv->capabilities);

	if (dev_priv->capabilities & SVGA_CAP_CAP2_REGISTER)

		vmw_print_capabilities2(dev_priv->capabilities2);





	ret = vmw_dma_masks(dev_priv);

	ret = vmw_dma_masks(dev_priv);

	if (unlikely(ret != 0))

	if (unlikely(ret != 0))

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -386,6 +386,7 @@ struct vmw_private { 
	uint32_t initial_height;

	uint32_t initial_height;

	u32 *mmio_virt;

	u32 *mmio_virt;

	uint32_t capabilities;

	uint32_t capabilities;

	uint32_t capabilities2;

	uint32_t max_gmr_ids;

	uint32_t max_gmr_ids;

	uint32_t max_gmr_pages;

	uint32_t max_gmr_pages;

	uint32_t max_mob_pages;

	uint32_t max_mob_pages;

drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -56,6 +56,9 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data, 
	case DRM_VMW_PARAM_HW_CAPS:

	case DRM_VMW_PARAM_HW_CAPS:

		param->value = dev_priv->capabilities;

		param->value = dev_priv->capabilities;

		break;

		break;

	case DRM_VMW_PARAM_HW_CAPS2:

		param->value = dev_priv->capabilities2;

		break;

	case DRM_VMW_PARAM_FIFO_CAPS:

	case DRM_VMW_PARAM_FIFO_CAPS:

		param->value = dev_priv->fifo.capabilities;

		param->value = dev_priv->fifo.capabilities;

		break;

		break;

include/uapi/drm/vmwgfx_drm.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -95,6 +95,7 @@ extern "C" { 
#define DRM_VMW_PARAM_MAX_MOB_SIZE     10

#define DRM_VMW_PARAM_MAX_MOB_SIZE     10

#define DRM_VMW_PARAM_SCREEN_TARGET    11

#define DRM_VMW_PARAM_SCREEN_TARGET    11

#define DRM_VMW_PARAM_DX               12

#define DRM_VMW_PARAM_DX               12

#define DRM_VMW_PARAM_HW_CAPS2         13





/**

/**

 * enum drm_vmw_handle_type - handle type for ref ioctls

 * enum drm_vmw_handle_type - handle type for ref ioctls