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Commit 398a719d authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Michael Ellerman
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powerpc/mm: Update bits used to skip hash_page 



We test a number of bits from DSISR/SRR1 before deciding
to call hash_page(). If any of these is set, we go directly
to do_page_fault() as the bit indicate a fault that needs
to be handled there (no hashing needed).

This updates the current open-coded masks to use the new
DSISR definitions.

This *does* change the masks actually used in two ways:

 - We used to test various bits that were defined as "always 0"
in the architecture and could be repurposed for something
else. From now on, we just ignore such bits.

 - We were missing some new bits defined on P9

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 870cfe77

arch/powerpc/kernel/exceptions-64s.S

+4 −2
Original line number Diff line number Diff line
@@ -1478,7 +1478,9 @@ USE_TEXT_SECTION() 
	.balign	IFETCH_ALIGN_BYTES

do_hash_page:

	#ifdef CONFIG_PPC_STD_MMU_64

	andis.	r0,r4,0xa450		/* weird error? */

	lis	r0,DSISR_BAD_FAULT_64S@h

	ori	r0,r0,DSISR_BAD_FAULT_64S@l

	and.	r0,r4,r0		/* weird error? */

	bne-	handle_page_fault	/* if not, try to insert a HPTE */

	CURRENT_THREAD_INFO(r11, r1)

	lwz	r0,TI_PREEMPT(r11)	/* If we're in an "NMI" */

arch/powerpc/kernel/head_32.S

+1 −1
Original line number Diff line number Diff line
@@ -388,7 +388,7 @@ DataAccess: 
	EXCEPTION_PROLOG

	mfspr	r10,SPRN_DSISR

	stw	r10,_DSISR(r11)

	andis.	r0,r10,0xa470		/* weird error? */

	andis.	r0,r10,DSISR_BAD_FAULT_32S@h

	bne	1f			/* if not, try to put a PTE */

	mfspr	r4,SPRN_DAR		/* into the hash table */

	rlwinm	r3,r10,32-15,21,21	/* DSISR_STORE -> _PAGE_RW */