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Commit 39416677 authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul
Browse files

dmaengine: dw: convert to __ffs() 



We replace __fls() by __ffs() since we have to find a *minimum* data width that
satisfies both source and destination.

While here, rename dwc_fast_fls() to dwc_fast_ffs() which it really is.

Fixes: 4c2d56c5 (dw_dmac: introduce dwc_fast_fls())
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 6ff33f39

drivers/dma/dw/core.c

+6 −6
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc) 


/*----------------------------------------------------------------------*/



static inline unsigned int dwc_fast_fls(unsigned long long v)

static inline unsigned int dwc_fast_ffs(unsigned long long v)

{

	/*

	 * We can be a lot more clever here, but this should take care
@@ -712,7 +712,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, 
			   dw->data_width[dwc->dst_master]);



	src_width = dst_width = min_t(unsigned int, data_width,

				      dwc_fast_fls(src | dest | len));

				      dwc_fast_ffs(src | dest | len));



	ctllo = DWC_DEFAULT_CTLLO(chan)

			| DWC_CTLL_DST_WIDTH(dst_width)
@@ -791,7 +791,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, 


	switch (direction) {

	case DMA_MEM_TO_DEV:

		reg_width = __fls(sconfig->dst_addr_width);

		reg_width = __ffs(sconfig->dst_addr_width);

		reg = sconfig->dst_addr;

		ctllo = (DWC_DEFAULT_CTLLO(chan)

				| DWC_CTLL_DST_WIDTH(reg_width)
@@ -811,7 +811,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, 
			len = sg_dma_len(sg);



			mem_width = min_t(unsigned int,

					  data_width, dwc_fast_fls(mem | len));

					  data_width, dwc_fast_ffs(mem | len));



slave_sg_todev_fill_desc:

			desc = dwc_desc_get(dwc);
@@ -848,7 +848,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, 
		}

		break;

	case DMA_DEV_TO_MEM:

		reg_width = __fls(sconfig->src_addr_width);

		reg_width = __ffs(sconfig->src_addr_width);

		reg = sconfig->src_addr;

		ctllo = (DWC_DEFAULT_CTLLO(chan)

				| DWC_CTLL_SRC_WIDTH(reg_width)
@@ -868,7 +868,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, 
			len = sg_dma_len(sg);



			mem_width = min_t(unsigned int,

					  data_width, dwc_fast_fls(mem | len));

					  data_width, dwc_fast_ffs(mem | len));



slave_sg_fromdev_fill_desc:

			desc = dwc_desc_get(dwc);