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Commit 3830e4f2 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Mauro Carvalho Chehab
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media: staging: tegra-vde: Correct minimum size of U/V planes



Stride of U/V planes must be aligned to 16 bytes (2 macroblocks). This
needs to be taken into account, otherwise it is possible to get a silent
memory corruption if dmabuf size is less than the size of decoded video
frame.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarHans Verkuil <hansverk@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
parent f072c44f
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+9 −3
Original line number Original line Diff line number Diff line
@@ -602,12 +602,12 @@ static int tegra_vde_attach_dmabufs_to_frame(struct device *dev,
					     struct tegra_vde_h264_frame *src,
					     struct tegra_vde_h264_frame *src,
					     enum dma_data_direction dma_dir,
					     enum dma_data_direction dma_dir,
					     bool baseline_profile,
					     bool baseline_profile,
					     size_t csize)
					     size_t lsize, size_t csize)
{
{
	int err;
	int err;


	err = tegra_vde_attach_dmabuf(dev, src->y_fd,
	err = tegra_vde_attach_dmabuf(dev, src->y_fd,
				      src->y_offset, csize * 4, SZ_256,
				      src->y_offset, lsize, SZ_256,
				      &frame->y_dmabuf_attachment,
				      &frame->y_dmabuf_attachment,
				      &frame->y_addr,
				      &frame->y_addr,
				      &frame->y_sgt,
				      &frame->y_sgt,
@@ -773,9 +773,11 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
	enum dma_data_direction dma_dir;
	enum dma_data_direction dma_dir;
	dma_addr_t bitstream_data_addr;
	dma_addr_t bitstream_data_addr;
	dma_addr_t bsev_ptr;
	dma_addr_t bsev_ptr;
	size_t lsize, csize;
	size_t bitstream_data_size;
	size_t bitstream_data_size;
	unsigned int macroblocks_nb;
	unsigned int macroblocks_nb;
	unsigned int read_bytes;
	unsigned int read_bytes;
	unsigned int cstride;
	unsigned int i;
	unsigned int i;
	long timeout;
	long timeout;
	int ret, err;
	int ret, err;
@@ -814,6 +816,10 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
		goto free_dpb_frames;
		goto free_dpb_frames;
	}
	}


	cstride = ALIGN(ctx.pic_width_in_mbs * 8, 16);
	csize = cstride * ctx.pic_height_in_mbs * 8;
	lsize = macroblocks_nb * 256;

	for (i = 0; i < ctx.dpb_frames_nb; i++) {
	for (i = 0; i < ctx.dpb_frames_nb; i++) {
		ret = tegra_vde_validate_frame(dev, &frames[i]);
		ret = tegra_vde_validate_frame(dev, &frames[i]);
		if (ret)
		if (ret)
@@ -827,7 +833,7 @@ static int tegra_vde_ioctl_decode_h264(struct tegra_vde *vde,
		ret = tegra_vde_attach_dmabufs_to_frame(dev, &dpb_frames[i],
		ret = tegra_vde_attach_dmabufs_to_frame(dev, &dpb_frames[i],
							&frames[i], dma_dir,
							&frames[i], dma_dir,
							ctx.baseline_profile,
							ctx.baseline_profile,
							macroblocks_nb * 64);
							lsize, csize);
		if (ret)
		if (ret)
			goto release_dpb_frames;
			goto release_dpb_frames;
	}
	}