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Commit 37f9034f authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Eduardo Valentin
Browse files

thermal: exynos: add ->tmu_control method 



Add ->tmu_control method to struct exynos_tmu_data and use it
in exynos_tmu_control().  Then add ->tmu_control implementations
for Exynos4210+ and Exynos5440.  Finally remove no longer needed
reg->tmu_[ctrl,inten], reg->inten_rise[0,1,2,3]_shift and
reg->inten_fall0_shift abstractions.

There should be no functional changes caused by this patch.

Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: default avatarEduardo Valentin <edubezval@gmail.com>
parent d00671c3

drivers/thermal/samsung/exynos_tmu.c

+58 −23
Original line number Original line Diff line number Diff line
@@ -53,6 +53,7 @@ 
 * @regulator: pointer to the TMU regulator structure.

 * @regulator: pointer to the TMU regulator structure.

 * @reg_conf: pointer to structure to register with core thermal.

 * @reg_conf: pointer to structure to register with core thermal.

 * @tmu_initialize: SoC specific TMU initialization method

 * @tmu_initialize: SoC specific TMU initialization method

 * @tmu_control: SoC specific TMU control method

 */

 */

struct exynos_tmu_data {

struct exynos_tmu_data {

	int id;

	int id;
@@ -68,6 +69,7 @@ struct exynos_tmu_data { 
	struct regulator *regulator;

	struct regulator *regulator;

	struct thermal_sensor_conf *reg_conf;

	struct thermal_sensor_conf *reg_conf;

	int (*tmu_initialize)(struct platform_device *pdev);

	int (*tmu_initialize)(struct platform_device *pdev);

	void (*tmu_control)(struct platform_device *pdev, bool on);

};

};





/*

/*
@@ -221,32 +223,10 @@ static u32 get_con_reg(struct exynos_tmu_data *data, u32 con) 
static void exynos_tmu_control(struct platform_device *pdev, bool on)

static void exynos_tmu_control(struct platform_device *pdev, bool on)

{

{

	struct exynos_tmu_data *data = platform_get_drvdata(pdev);

	struct exynos_tmu_data *data = platform_get_drvdata(pdev);

	struct exynos_tmu_platform_data *pdata = data->pdata;

	const struct exynos_tmu_registers *reg = pdata->registers;

	unsigned int con, interrupt_en;





	mutex_lock(&data->lock);

	mutex_lock(&data->lock);

	clk_enable(data->clk);

	clk_enable(data->clk);



	data->tmu_control(pdev, on);

	con = get_con_reg(data, readl(data->base + reg->tmu_ctrl));



	if (on) {

		con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);

		interrupt_en =

			pdata->trigger_enable[3] << reg->inten_rise3_shift |

			pdata->trigger_enable[2] << reg->inten_rise2_shift |

			pdata->trigger_enable[1] << reg->inten_rise1_shift |

			pdata->trigger_enable[0] << reg->inten_rise0_shift;

		if (TMU_SUPPORTS(pdata, FALLING_TRIP))

			interrupt_en |=

				interrupt_en << reg->inten_fall0_shift;

	} else {

		con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);

		interrupt_en = 0; /* Disable all interrupts */

	}

	writel(interrupt_en, data->base + reg->tmu_inten);

	writel(con, data->base + reg->tmu_ctrl);



	clk_disable(data->clk);

	clk_disable(data->clk);

	mutex_unlock(&data->lock);

	mutex_unlock(&data->lock);

}

}
@@ -388,6 +368,58 @@ static int exynos5440_tmu_initialize(struct platform_device *pdev) 
	return ret;

	return ret;

}

}





static void exynos4210_tmu_control(struct platform_device *pdev, bool on)

{

	struct exynos_tmu_data *data = platform_get_drvdata(pdev);

	struct exynos_tmu_platform_data *pdata = data->pdata;

	unsigned int con, interrupt_en;



	con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));



	if (on) {

		con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);

		interrupt_en =

			pdata->trigger_enable[3] << EXYNOS_TMU_INTEN_RISE3_SHIFT |

			pdata->trigger_enable[2] << EXYNOS_TMU_INTEN_RISE2_SHIFT |

			pdata->trigger_enable[1] << EXYNOS_TMU_INTEN_RISE1_SHIFT |

			pdata->trigger_enable[0] << EXYNOS_TMU_INTEN_RISE0_SHIFT;

		if (TMU_SUPPORTS(pdata, FALLING_TRIP))

			interrupt_en |=

				interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;

	} else {

		con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);

		interrupt_en = 0; /* Disable all interrupts */

	}

	writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);

	writel(con, data->base + EXYNOS_TMU_REG_CONTROL);

}



static void exynos5440_tmu_control(struct platform_device *pdev, bool on)

{

	struct exynos_tmu_data *data = platform_get_drvdata(pdev);

	struct exynos_tmu_platform_data *pdata = data->pdata;

	unsigned int con, interrupt_en;



	con = get_con_reg(data, readl(data->base + EXYNOS5440_TMU_S0_7_CTRL));



	if (on) {

		con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);

		interrupt_en =

			pdata->trigger_enable[3] << EXYNOS5440_TMU_INTEN_RISE3_SHIFT |

			pdata->trigger_enable[2] << EXYNOS5440_TMU_INTEN_RISE2_SHIFT |

			pdata->trigger_enable[1] << EXYNOS5440_TMU_INTEN_RISE1_SHIFT |

			pdata->trigger_enable[0] << EXYNOS5440_TMU_INTEN_RISE0_SHIFT;

		if (TMU_SUPPORTS(pdata, FALLING_TRIP))

			interrupt_en |=

				interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;

	} else {

		con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);

		interrupt_en = 0; /* Disable all interrupts */

	}

	writel(interrupt_en, data->base + EXYNOS5440_TMU_S0_7_IRQEN);

	writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);

}



static int exynos_tmu_read(struct exynos_tmu_data *data)

static int exynos_tmu_read(struct exynos_tmu_data *data)

{

{

	struct exynos_tmu_platform_data *pdata = data->pdata;

	struct exynos_tmu_platform_data *pdata = data->pdata;
@@ -685,6 +717,7 @@ static int exynos_tmu_probe(struct platform_device *pdev) 
	switch (data->soc) {

	switch (data->soc) {

	case SOC_ARCH_EXYNOS4210:

	case SOC_ARCH_EXYNOS4210:

		data->tmu_initialize = exynos4210_tmu_initialize;

		data->tmu_initialize = exynos4210_tmu_initialize;

		data->tmu_control = exynos4210_tmu_control;

		break;

		break;

	case SOC_ARCH_EXYNOS3250:

	case SOC_ARCH_EXYNOS3250:

	case SOC_ARCH_EXYNOS4412:

	case SOC_ARCH_EXYNOS4412:
@@ -693,9 +726,11 @@ static int exynos_tmu_probe(struct platform_device *pdev) 
	case SOC_ARCH_EXYNOS5420:

	case SOC_ARCH_EXYNOS5420:

	case SOC_ARCH_EXYNOS5420_TRIMINFO:

	case SOC_ARCH_EXYNOS5420_TRIMINFO:

		data->tmu_initialize = exynos4412_tmu_initialize;

		data->tmu_initialize = exynos4412_tmu_initialize;

		data->tmu_control = exynos4210_tmu_control;

		break;

		break;

	case SOC_ARCH_EXYNOS5440:

	case SOC_ARCH_EXYNOS5440:

		data->tmu_initialize = exynos5440_tmu_initialize;

		data->tmu_initialize = exynos5440_tmu_initialize;

		data->tmu_control = exynos5440_tmu_control;

		break;

		break;

	default:

	default:

		ret = -EINVAL;

		ret = -EINVAL;

drivers/thermal/samsung/exynos_tmu.h

+2 −23
Original line number Original line Diff line number Diff line
@@ -68,38 +68,17 @@ enum soc_type { 
#define TMU_SUPPORTS(a, b)	(a->features & TMU_SUPPORT_ ## b)

#define TMU_SUPPORTS(a, b)	(a->features & TMU_SUPPORT_ ## b)





/**

/**

 * struct exynos_tmu_register - register descriptors to access registers and

 * struct exynos_tmu_register - register descriptors to access registers.

 * bitfields. The register validity, offsets and bitfield values may vary

 * The register validity may vary slightly across different exynos SOC's.

 * slightly across different exynos SOC's.

 * @tmu_ctrl: TMU main controller register.

 * @tmu_cur_temp: register containing the current temperature of the TMU.

 * @tmu_cur_temp: register containing the current temperature of the TMU.

 * @tmu_inten: register containing the different threshold interrupt

	enable bits.

 * @inten_rise0_shift: shift bits of rising 0 interrupt bits.

 * @inten_rise1_shift: shift bits of rising 1 interrupt bits.

 * @inten_rise2_shift: shift bits of rising 2 interrupt bits.

 * @inten_rise3_shift: shift bits of rising 3 interrupt bits.

 * @inten_fall0_shift: shift bits of falling 0 interrupt bits.

 * @tmu_intstat: Register containing the interrupt status values.

 * @tmu_intstat: Register containing the interrupt status values.

 * @tmu_intclear: Register for clearing the raised interrupt status.

 * @tmu_intclear: Register for clearing the raised interrupt status.

 * @emul_con: TMU emulation controller register.

 * @emul_con: TMU emulation controller register.

 */

 */

struct exynos_tmu_registers {

struct exynos_tmu_registers {

	u32	tmu_ctrl;



	u32	tmu_cur_temp;

	u32	tmu_cur_temp;



	u32	tmu_inten;

	u32	inten_rise0_shift;

	u32	inten_rise1_shift;

	u32	inten_rise2_shift;

	u32	inten_rise3_shift;

	u32	inten_fall0_shift;



	u32	tmu_intstat;

	u32	tmu_intstat;



	u32	tmu_intclear;

	u32	tmu_intclear;



	u32	emul_con;

	u32	emul_con;

};

};

drivers/thermal/samsung/exynos_tmu_data.c

+0 −41
Original line number Original line Diff line number Diff line
@@ -26,13 +26,7 @@ 




#if defined(CONFIG_CPU_EXYNOS4210)

#if defined(CONFIG_CPU_EXYNOS4210)

static const struct exynos_tmu_registers exynos4210_tmu_registers = {

static const struct exynos_tmu_registers exynos4210_tmu_registers = {

	.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_inten = EXYNOS_TMU_REG_INTEN,

	.inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,

	.inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,

	.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,

	.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

};

};
@@ -80,13 +74,7 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data = { 




#if defined(CONFIG_SOC_EXYNOS3250)

#if defined(CONFIG_SOC_EXYNOS3250)

static const struct exynos_tmu_registers exynos3250_tmu_registers = {

static const struct exynos_tmu_registers exynos3250_tmu_registers = {

	.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_inten = EXYNOS_TMU_REG_INTEN,

	.inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,

	.inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,

	.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,

	.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

	.emul_con = EXYNOS_EMUL_CON,

	.emul_con = EXYNOS_EMUL_CON,
@@ -147,14 +135,7 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = { 




#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)

#if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)

static const struct exynos_tmu_registers exynos4412_tmu_registers = {

static const struct exynos_tmu_registers exynos4412_tmu_registers = {

	.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_inten = EXYNOS_TMU_REG_INTEN,

	.inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,

	.inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,

	.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,

	.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,

	.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

	.emul_con = EXYNOS_EMUL_CON,

	.emul_con = EXYNOS_EMUL_CON,
@@ -227,14 +208,7 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = { 




#if defined(CONFIG_SOC_EXYNOS5260)

#if defined(CONFIG_SOC_EXYNOS5260)

static const struct exynos_tmu_registers exynos5260_tmu_registers = {

static const struct exynos_tmu_registers exynos5260_tmu_registers = {

	.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_inten = EXYNOS5260_TMU_REG_INTEN,

	.inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,

	.inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,

	.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,

	.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,

	.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,

	.tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT,

	.tmu_intstat = EXYNOS5260_TMU_REG_INTSTAT,

	.tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR,

	.tmu_intclear = EXYNOS5260_TMU_REG_INTCLEAR,

	.emul_con = EXYNOS5260_EMUL_CON,

	.emul_con = EXYNOS5260_EMUL_CON,
@@ -297,15 +271,7 @@ struct exynos_tmu_init_data const exynos5260_default_tmu_data = { 




#if defined(CONFIG_SOC_EXYNOS5420)

#if defined(CONFIG_SOC_EXYNOS5420)

static const struct exynos_tmu_registers exynos5420_tmu_registers = {

static const struct exynos_tmu_registers exynos5420_tmu_registers = {

	.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,

	.tmu_inten = EXYNOS_TMU_REG_INTEN,

	.inten_rise0_shift = EXYNOS_TMU_INTEN_RISE0_SHIFT,

	.inten_rise1_shift = EXYNOS_TMU_INTEN_RISE1_SHIFT,

	.inten_rise2_shift = EXYNOS_TMU_INTEN_RISE2_SHIFT,

	/* INTEN_RISE3 Not availble in exynos5420 */

	.inten_rise3_shift = EXYNOS_TMU_INTEN_RISE3_SHIFT,

	.inten_fall0_shift = EXYNOS_TMU_INTEN_FALL0_SHIFT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intstat = EXYNOS_TMU_REG_INTSTAT,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

	.tmu_intclear = EXYNOS_TMU_REG_INTCLEAR,

	.emul_con = EXYNOS_EMUL_CON,

	.emul_con = EXYNOS_EMUL_CON,
@@ -374,14 +340,7 @@ struct exynos_tmu_init_data const exynos5420_default_tmu_data = { 




#if defined(CONFIG_SOC_EXYNOS5440)

#if defined(CONFIG_SOC_EXYNOS5440)

static const struct exynos_tmu_registers exynos5440_tmu_registers = {

static const struct exynos_tmu_registers exynos5440_tmu_registers = {

	.tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,

	.tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,

	.tmu_cur_temp = EXYNOS5440_TMU_S0_7_TEMP,

	.tmu_inten = EXYNOS5440_TMU_S0_7_IRQEN,

	.inten_rise0_shift = EXYNOS5440_TMU_INTEN_RISE0_SHIFT,

	.inten_rise1_shift = EXYNOS5440_TMU_INTEN_RISE1_SHIFT,

	.inten_rise2_shift = EXYNOS5440_TMU_INTEN_RISE2_SHIFT,

	.inten_rise3_shift = EXYNOS5440_TMU_INTEN_RISE3_SHIFT,

	.inten_fall0_shift = EXYNOS5440_TMU_INTEN_FALL0_SHIFT,

	.tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,

	.tmu_intstat = EXYNOS5440_TMU_S0_7_IRQ,

	.tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,

	.tmu_intclear = EXYNOS5440_TMU_S0_7_IRQ,

	.emul_con = EXYNOS5440_TMU_S0_7_DEBUG,

	.emul_con = EXYNOS5440_TMU_S0_7_DEBUG,