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Commit 37da7bbb authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull tty/serial driver updates from Greg KH:
 "Here's the big tty/serial driver update for 3.19-rc1.

  There are a number of TTY core changes/fixes in here from Peter Hurley
  that have all been teted in linux-next for a long time now.  There are
  also the normal serial driver updates as well, full details in the
  changelog below"

* tag 'tty-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (219 commits)
  serial: pxa: hold port.lock when reporting modem line changes
  tty-hvsi_lib: Deletion of an unnecessary check before the function call "tty_kref_put"
  tty: Deletion of unnecessary checks before two function calls
  n_tty: Fix read_buf race condition, increment read_head after pushing data
  serial: of-serial: add PM suspend/resume support
  Revert "serial: of-serial: add PM suspend/resume support"
  Revert "serial: of-serial: fix up PM ops on no_console_suspend and port type"
  serial: 8250: don't attempt a trylock if in sysrq
  serial: core: Add big-endian iotype
  serial: samsung: use port->fifosize instead of hardcoded values
  serial: samsung: prefer to use fifosize from driver data
  serial: samsung: fix style problems
  serial: samsung: wait for transfer completion before clock disable
  serial: icom: fix error return code
  serial: tegra: clean up tty-flag assignments
  serial: Fix io address assign flow with Fintek PCI-to-UART Product
  serial: mxs-auart: fix tx_empty against shift register
  serial: mxs-auart: fix gpio change detection on interrupt
  serial: mxs-auart: Fix mxs_auart_set_ldisc()
  serial: 8250_dw: Use 64-bit access for OCTEON.
  ...
parents e7cf773d dd63af10
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+30 −0
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* BCM63xx UART

Required properties:

- compatible: "brcm,bcm6345-uart"

- reg: The base address of the UART register bank.

- interrupts: A single interrupt specifier.

- clocks: Clock driving the hardware; used to figure out the baud rate
  divisor.

Example:

	uart0: serial@14e00520 {
		compatible = "brcm,bcm6345-uart";
		reg = <0x14e00520 0x18>;
		interrupt-parent = <&periph_intc>;
		interrupts = <2>;
		clocks = <&periph_clk>;
	};

	clocks {
		periph_clk: periph_clk@0 {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <54000000>;
		};
	};
+9 −1
Original line number Diff line number Diff line
@@ -11,8 +11,13 @@ Required properties:
- dma-names: "rx" for RX channel, "tx" for TX channel.

Optional properties:
- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines,
- fsl,uart-has-rtscts : Indicate the UART has RTS and CTS lines
  for hardware flow control,
	it also means you enable the DMA support for this UART.
- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
  line respectively. It will use specified PIO instead of the peripheral
  function pin for the USART feature.
  If unsure, don't specify this property.

Example:
auart0: serial@8006a000 {
@@ -21,6 +26,9 @@ auart0: serial@8006a000 {
	interrupts = <112>;
	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
	dma-names = "rx", "tx";
	cts-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
	dsr-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
	dcd-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
};

Note: Each auart port should have an alias correctly numbered in "aliases"
+1 −0
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@@ -10,6 +10,7 @@ Required properties:
	- "ns16850"
	- "nvidia,tegra20-uart"
	- "nxp,lpc3220-uart"
	- "ralink,rt2880-uart"
	- "ibm,qpace-nwp-serial"
	- "altr,16550-FIFO32"
	- "altr,16550-FIFO64"
+16 −4
Original line number Diff line number Diff line
@@ -6,23 +6,35 @@ Required properties:
- interrupts: exactly one interrupt specifier

Optional properties:
- pinctrl: When present, must have one state named "default",
- pinctrl:
	   When present, must have one state named "default",
	   and may contain a second name named "sleep". The former
	   state sets up pins for ordinary operation whereas
	   the latter state will put the associated pins to sleep
	   when the UART is unused
- clocks:  When present, the first clock listed must correspond to
- clocks:
	   When present, the first clock listed must correspond to
	   the clock named UARTCLK on the IP block, i.e. the clock
	   to the external serial line, whereas the second clock
	   must correspond to the PCLK clocking the internal logic
	   of the block. Just listing one clock (the first one) is
	   deprecated.
- clocks-names: When present, the first clock listed must be named
- clocks-names:
	   When present, the first clock listed must be named
	   "uartclk" and the second clock listed must be named
	   "apb_pclk"
- dmas:	   When present, may have one or two dma channels.
- dmas:	
	   When present, may have one or two dma channels.
	   The first one must be named "rx", the second one
	   must be named "tx".
- auto-poll:
	   Enables polling when using RX DMA.
- poll-rate-ms:
	   Rate at which poll occurs when auto-poll is set,
	   default 100ms.
- poll-timeout-ms:
	   Poll timeout when auto-poll is set, default
	   3000ms.

See also bindings/arm/primecell.txt

+47 −22
Original line number Diff line number Diff line
@@ -27,9 +27,14 @@ Optional properties:
- dmas: Should contain dma specifiers for transmit and receive channels
- dma-names: Should contain "tx" for transmit and "rx" for receive channels

Note: Aliases may be defined to ensure the correct ordering of the UARTs.
The alias serialN will result in the UART being assigned port N.  If any
serialN alias exists, then an alias must exist for each enabled UART.  The
serialN aliases should be in a .dts file instead of in a .dtsi file.

Examples:

A uartdm v1.4 device with dma capabilities.
- A uartdm v1.4 device with dma capabilities.

	serial@f991e000 {
		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
@@ -41,7 +46,7 @@ serial@f991e000 {
		dma-names = "tx", "rx";
	};

A uartdm v1.3 device without dma capabilities and part of a GSBI complex.
- A uartdm v1.3 device without dma capabilities and part of a GSBI complex.

	serial@19c40000 {
		compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
@@ -51,3 +56,23 @@ serial@19c40000 {
		clocks = <&gsbi5_uart_cxc>, <&gsbi5_ahb_cxc>;
		clock-names = "core", "iface";
	};

- serialN alias.

	aliases {
		serial0 = &uarta;
		serial1 = &uartc;
		serial2 = &uartb;
	};

	uarta: serial@12490000 {
		status = "ok";
	};

	uartb: serial@16340000 {
		status = "ok";
	};

	uartc: serial@1a240000 {
		status = "ok";
	};
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