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Commit 374ed9d1 authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas
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arm64: documentation: tighten up tagged pointer documentation 



Commit d50240a5 ("arm64: mm: permit use of tagged pointers at EL0")
added support for tagged pointers in userspace, but the corresponding
update to Documentation/ contained some imprecise statements.

This patch fixes up some minor ambiguities in the text, hopefully making
it more clear about exactly what the kernel expects from user virtual
addresses.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 59f67e16

Documentation/arm64/tagged-pointers.txt

+7 −7
Original line number Diff line number Diff line
@@ -18,17 +18,17 @@ this byte for application use, with the following caveats: 
	    parameters containing user virtual addresses *must* have

	    their top byte cleared before trapping to the kernel.



	(2) Tags are not guaranteed to be preserved when delivering

	    signals. This means that signal handlers in applications

	    making use of tags cannot rely on the tag information for

	    user virtual addresses being maintained for fields inside

	    siginfo_t. One exception to this rule is for signals raised

	    in response to debug exceptions, where the tag information

	(2) Non-zero tags are not preserved when delivering signals.

	    This means that signal handlers in applications making use

	    of tags cannot rely on the tag information for user virtual

	    addresses being maintained for fields inside siginfo_t.

	    One exception to this rule is for signals raised in response

	    to watchpoint debug exceptions, where the tag information

	    will be preserved.



	(3) Special care should be taken when using tagged pointers,

	    since it is likely that C compilers will not hazard two

	    addresses differing only in the upper bits.

	    virtual addresses differing only in the upper byte.



The architecture prevents the use of a tagged PC, so the upper byte will

be set to a sign-extension of bit 55 on exception return.