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Commit 373ababd authored by Valentine Barshak's avatar Valentine Barshak Committed by Simon Horman
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ARM: shmobile: r8a7791: Add SATA clocks 



This adds SATA[01] clock support to R8A7791 SoC.

Signed-off-by: default avatarValentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 5a6f994a

arch/arm/mach-shmobile/clock-r8a7791.c

+5 −0
Original line number Diff line number Diff line
@@ -135,6 +135,7 @@ static struct clk *main_clks[] = { 
/* MSTP */

enum {

	MSTP931, MSTP930, MSTP929, MSTP928, MSTP927, MSTP925,

	MSTP815, MSTP814,

	MSTP813,

	MSTP811, MSTP810, MSTP809,

	MSTP726, MSTP724, MSTP723, MSTP721, MSTP720,
@@ -153,6 +154,8 @@ static struct clk mstp_clks[MSTP_NR] = { 
	[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */

	[MSTP927] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 27, MSTPSR9, 0), /* I2C4 */

	[MSTP925] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 25, MSTPSR9, 0), /* I2C5 */

	[MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */

	[MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */

	[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */

	[MSTP811] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 11, MSTPSR8, 0), /* VIN0 */

	[MSTP810] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 10, MSTPSR8, 0), /* VIN1 */
@@ -229,6 +232,8 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_DEV_ID("r8a7791-vin.0", &mstp_clks[MSTP811]),

	CLKDEV_DEV_ID("r8a7791-vin.1", &mstp_clks[MSTP810]),

	CLKDEV_DEV_ID("r8a7791-vin.2", &mstp_clks[MSTP809]),

	CLKDEV_DEV_ID("sata-r8a7791.0", &mstp_clks[MSTP815]),

	CLKDEV_DEV_ID("sata-r8a7791.1", &mstp_clks[MSTP814]),

};



#define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31)		\