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Commit 36204d80 authored by Oscar Mateo's avatar Oscar Mateo Committed by Mika Kuoppala
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drm/i915/icl: Wa_1406680159 



Disable GWL clock gating to prevent an issue that might
cause hangs.

v2: Rebased on top of the WA refactoring
v3: Wa_2201832410 officially merged with Wa_1406680159
v4: Added References (Mika)
v5:
  - Rebased
  - C, not lisp (Chris)
  - Add reference where WA is better explained (Rodrigo)
  - Add reference to WA that got merged with this

References: HSDES#1406681710
References: HSDES#1406680159
References: HSDES#2201832410
Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-11-git-send-email-oscar.mateo@intel.com
parent 0a437d49

drivers/gpu/drm/i915/intel_workarounds.c

+5 −0
Original line number Diff line number Diff line
@@ -745,6 +745,11 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv) 
		I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE,

			   I915_READ(SLICE_UNIT_LEVEL_CLKGATE) |

			   MSCUNIT_CLKGATE_DIS);



	/* Wa_1406680159:icl */

	I915_WRITE(SUBSLICE_UNIT_LEVEL_CLKGATE,

		   I915_READ(SUBSLICE_UNIT_LEVEL_CLKGATE) |

		   GWUNIT_CLKGATE_DIS);

}



void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)