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Commit 35dc9ec1 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'linus' into efi/core, to pick up fixes



Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 0ec7ae92 07837831
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+5 −0
Original line number Diff line number Diff line
@@ -48,6 +48,9 @@ Felix Kuhling <fxkuehl@gmx.de>
Felix Moeller <felix@derklecks.de>
Filipe Lautert <filipe@icewall.org>
Franck Bui-Huu <vagabon.xyz@gmail.com>
Frank Rowand <frowand.list@gmail.com> <frowand@mvista.com>
Frank Rowand <frowand.list@gmail.com> <frank.rowand@am.sony.com>
Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com>
Frank Zago <fzago@systemfabricworks.com>
Greg Kroah-Hartman <greg@echidna.(none)>
Greg Kroah-Hartman <gregkh@suse.de>
@@ -66,6 +69,7 @@ Jean Tourrilhes <jt@hpl.hp.com>
Jeff Garzik <jgarzik@pretzel.yyz.us>
Jens Axboe <axboe@suse.de>
Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
John Stultz <johnstul@us.ibm.com>
<josh@joshtriplett.org> <josh@freedesktop.org>
<josh@joshtriplett.org> <josh@kernel.org>
@@ -79,6 +83,7 @@ Kay Sievers <kay.sievers@vrfy.org>
Kenneth W Chen <kenneth.w.chen@intel.com>
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
Koushik <raghavendra.koushik@neterion.com>
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Leonid I Ananiev <leonid.i.ananiev@intel.com>
Linas Vepstas <linas@austin.ibm.com>
+0 −1
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@@ -192,7 +192,6 @@ nodes to be present and contain the properties described below.
			  can be one of:
			    "allwinner,sun6i-a31"
			    "allwinner,sun8i-a23"
			    "arm,psci"
			    "arm,realview-smp"
			    "brcm,bcm-nsp-smp"
			    "brcm,brahma-b15"
+2 −2
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@@ -6,8 +6,8 @@ RK3xxx SoCs.
Required properties :

 - reg : Offset and length of the register set for the device
 - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
		"rockchip,rk3288-i2c".
 - compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c",
		"rockchip,rk3228-i2c" or "rockchip,rk3288-i2c".
 - interrupts : interrupt number
 - clocks : parent clock

+3 −3
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@@ -45,13 +45,13 @@ Required properties:
Optional properties:
- dual_emac_res_vlan	: Specifies VID to be used to segregate the ports
- mac-address		: See ethernet.txt file in the same directory
- phy_id		: Specifies slave phy id
- phy_id		: Specifies slave phy id (deprecated, use phy-handle)
- phy-handle		: See ethernet.txt file in the same directory

Slave sub-nodes:
- fixed-link		: See fixed-link.txt file in the same directory
			  Either the property phy_id, or the sub-node
			  fixed-link can be specified

Note: Exactly one of phy_id, phy-handle, or fixed-link must be specified.

Note: "ti,hwmods" field is used to fetch the base address and irq
resources from TI, omap hwmod data base during device registration.
+3 −3
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@@ -6,7 +6,7 @@ This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
using the SGDMA and MSGDMA soft DMA IP components. The driver uses the
platform bus to obtain component resources. The designs used to test this
driver were built for a Cyclone(R) V SOC FPGA board, a Cyclone(R) V FPGA board,
and tested with ARM and NIOS processor hosts seperately. The anticipated use
and tested with ARM and NIOS processor hosts separately. The anticipated use
cases are simple communications between an embedded system and an external peer
for status and simple configuration of the embedded system.

@@ -65,14 +65,14 @@ Driver parameters can be also passed in command line by using:
4.1) Transmit process
When the driver's transmit routine is called by the kernel, it sets up a
transmit descriptor by calling the underlying DMA transmit routine (SGDMA or
MSGDMA), and initites a transmit operation. Once the transmit is complete, an
MSGDMA), and initiates a transmit operation. Once the transmit is complete, an
interrupt is driven by the transmit DMA logic. The driver handles the transmit
completion in the context of the interrupt handling chain by recycling
resource required to send and track the requested transmit operation.

4.2) Receive process
The driver will post receive buffers to the receive DMA logic during driver
intialization. Receive buffers may or may not be queued depending upon the
initialization. Receive buffers may or may not be queued depending upon the
underlying DMA logic (MSGDMA is able queue receive buffers, SGDMA is not able
to queue receive buffers to the SGDMA receive logic). When a packet is
received, the DMA logic generates an interrupt. The driver handles a receive
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