Merge branch 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6 (357d596b) · Commits · e / devices / android_kernel_oneplus_sm7250

arch/ia64/hp/sim/boot/boot_head.S

+25 −6

Original line number	Diff line number	Diff line
		@@ -4,6 +4,7 @@
		*/

		#include <asm/asmmacro.h>
		#include <asm/pal.h>

		.bss
		.align 16
		@@ -49,7 +50,11 @@ GLOBAL_ENTRY(jmp_to_kernel)
		br.sptk.few b7
		END(jmp_to_kernel)


		/*
		* r28 contains the index of the PAL function
		* r29--31 the args
		* Return values in ret0--3 (r8--11)
		*/
		GLOBAL_ENTRY(pal_emulator_static)
		mov r8=-1
		mov r9=256
		@@ -62,7 +67,7 @@ GLOBAL_ENTRY(pal_emulator_static)
		cmp.gtu p6,p7=r9,r28
		(p6) br.cond.sptk.few stacked
		;;
		static: cmp.eq p6,p7=6,r28 /* PAL_PTCE_INFO */
		static: cmp.eq p6,p7=PAL_PTCE_INFO,r28
		(p7) br.cond.sptk.few 1f
		;;
		mov r8=0 /* status = 0 */
		@@ -70,21 +75,21 @@ static: cmp.eq p6,p7=6,r28 /* PAL_PTCE_INFO */
		movl r10=0x0000000200000003 /* count[0], count[1] */
		movl r11=0x1000000000002000 /* stride[0], stride[1] */
		br.cond.sptk.few rp
		1: cmp.eq p6,p7=14,r28 /* PAL_FREQ_RATIOS */
		1: cmp.eq p6,p7=PAL_FREQ_RATIOS,r28
		(p7) br.cond.sptk.few 1f
		mov r8=0 /* status = 0 */
		movl r9 =0x100000064 /* proc_ratio (1/100) */
		movl r10=0x100000100 /* bus_ratio<<32 (1/256) */
		movl r11=0x100000064 /* itc_ratio<<32 (1/100) */
		;;
		1: cmp.eq p6,p7=19,r28 /* PAL_RSE_INFO */
		1: cmp.eq p6,p7=PAL_RSE_INFO,r28
		(p7) br.cond.sptk.few 1f
		mov r8=0 /* status = 0 */
		mov r9=96 /* num phys stacked */
		mov r10=0 /* hints */
		mov r11=0
		br.cond.sptk.few rp
		1: cmp.eq p6,p7=1,r28 /* PAL_CACHE_FLUSH */
		1: cmp.eq p6,p7=PAL_CACHE_FLUSH,r28 /* PAL_CACHE_FLUSH */
		(p7) br.cond.sptk.few 1f
		mov r9=ar.lc
		movl r8=524288 /* flush 512k million cache lines (16MB) */
		@@ -102,7 +107,7 @@ static: cmp.eq p6,p7=6,r28 /* PAL_PTCE_INFO */
		mov ar.lc=r9
		mov r8=r0
		;;
		1: cmp.eq p6,p7=15,r28 /* PAL_PERF_MON_INFO */
		1: cmp.eq p6,p7=PAL_PERF_MON_INFO,r28
		(p7) br.cond.sptk.few 1f
		mov r8=0 /* status = 0 */
		movl r9 =0x08122f04 /* generic=4 width=47 retired=8 cycles=18 */
		@@ -138,6 +143,20 @@ static: cmp.eq p6,p7=6,r28 /* PAL_PTCE_INFO */
		st8 [r29]=r0,16 /* clear remaining bits */
		st8 [r18]=r0,16 /* clear remaining bits */
		;;
		1: cmp.eq p6,p7=PAL_VM_SUMMARY,r28
		(p7) br.cond.sptk.few 1f
		mov r8=0 /* status = 0 */
		movl r9=0x2044040020F1865 /* num_tc_levels=2, num_unique_tcs=4 */
		/* max_itr_entry=64, max_dtr_entry=64 */
		/* hash_tag_id=2, max_pkr=15 */
		/* key_size=24, phys_add_size=50, vw=1 */
		movl r10=0x183C /* rid_size=24, impl_va_msb=60 */
		;;
		1: cmp.eq p6,p7=PAL_MEM_ATTRIB,r28
		(p7) br.cond.sptk.few 1f
		mov r8=0 /* status = 0 */
		mov r9=0x80\|0x01 /* NatPage\|WB */
		;;
		1: br.cond.sptk.few rp
		stacked:
		br.ret.sptk.few rp

arch/ia64/kernel/asm-offsets.c

+32 −8

Original line number	Diff line number	Diff line
		@@ -211,17 +211,41 @@ void foo(void)
		#endif

		BLANK();
		DEFINE(IA64_MCA_CPU_PROC_STATE_DUMP_OFFSET,
		offsetof (struct ia64_mca_cpu, proc_state_dump));
		DEFINE(IA64_MCA_CPU_STACK_OFFSET,
		offsetof (struct ia64_mca_cpu, stack));
		DEFINE(IA64_MCA_CPU_STACKFRAME_OFFSET,
		offsetof (struct ia64_mca_cpu, stackframe));
		DEFINE(IA64_MCA_CPU_RBSTORE_OFFSET,
		offsetof (struct ia64_mca_cpu, rbstore));
		DEFINE(IA64_MCA_CPU_MCA_STACK_OFFSET,
		offsetof (struct ia64_mca_cpu, mca_stack));
		DEFINE(IA64_MCA_CPU_INIT_STACK_OFFSET,
		offsetof (struct ia64_mca_cpu, init_stack));
		BLANK();
		DEFINE(IA64_SAL_OS_STATE_COMMON_OFFSET,
		offsetof (struct ia64_sal_os_state, sal_ra));
		DEFINE(IA64_SAL_OS_STATE_OS_GP_OFFSET,
		offsetof (struct ia64_sal_os_state, os_gp));
		DEFINE(IA64_SAL_OS_STATE_PAL_MIN_STATE_OFFSET,
		offsetof (struct ia64_sal_os_state, pal_min_state));
		DEFINE(IA64_SAL_OS_STATE_PROC_STATE_PARAM_OFFSET,
		offsetof (struct ia64_sal_os_state, proc_state_param));
		DEFINE(IA64_SAL_OS_STATE_SIZE,
		sizeof (struct ia64_sal_os_state));
		DEFINE(IA64_PMSA_GR_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_gr));
		DEFINE(IA64_PMSA_BANK1_GR_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_bank1_gr));
		DEFINE(IA64_PMSA_PR_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_pr));
		DEFINE(IA64_PMSA_BR0_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_br0));
		DEFINE(IA64_PMSA_RSC_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_rsc));
		DEFINE(IA64_PMSA_IIP_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_iip));
		DEFINE(IA64_PMSA_IPSR_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_ipsr));
		DEFINE(IA64_PMSA_IFS_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_ifs));
		DEFINE(IA64_PMSA_XIP_OFFSET,
		offsetof (struct pal_min_state_area_s, pmsa_xip));
		BLANK();

		/* used by fsys_gettimeofday in arch/ia64/kernel/fsys.S */
		DEFINE(IA64_TIME_INTERPOLATOR_ADDRESS_OFFSET, offsetof (struct time_interpolator, addr));
		DEFINE(IA64_TIME_INTERPOLATOR_SOURCE_OFFSET, offsetof (struct time_interpolator, source));

arch/ia64/kernel/ivt.S

+0 −1

Original line number	Diff line number	Diff line
		@@ -69,7 +69,6 @@
		# define DBG_FAULT(i)
		#endif

		#define MINSTATE_VIRT /* needed by minstate.h */
		#include "minstate.h"

		#define FAULT(n) \