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Commit 3549d822 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'renesas-sh-drivers-for-v4.5' of... 

Merge tag 'renesas-sh-drivers-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

Pull SH driver updates from Simon Horman:
 "Clean up the clock API on legacy SH to make it more similar to the
  Common Clock Framework.  This will avoid different behaviour in
  drivers shared between legacy and CCF-based platforms (e.g.  SCIF)"

* tag 'renesas-sh-drivers-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  drivers: sh: clk: Avoid crashes when passing NULL clocks
  drivers: sh: clk: Remove obsolete and unused clk_round_parent()
parents 9638685e 6575a9c6

drivers/sh/clk/core.c

+12 −88
Original line number Diff line number Diff line
@@ -469,6 +469,9 @@ void clk_enable_init_clocks(void) 


unsigned long clk_get_rate(struct clk *clk)

{

	if (!clk)

		return 0;



	return clk->rate;

}

EXPORT_SYMBOL_GPL(clk_get_rate);
@@ -478,6 +481,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate) 
	int ret = -EOPNOTSUPP;

	unsigned long flags;



	if (!clk)

		return 0;



	spin_lock_irqsave(&clock_lock, flags);



	if (likely(clk->ops && clk->ops->set_rate)) {
@@ -535,12 +541,18 @@ EXPORT_SYMBOL_GPL(clk_set_parent); 


struct clk *clk_get_parent(struct clk *clk)

{

	if (!clk)

		return NULL;



	return clk->parent;

}

EXPORT_SYMBOL_GPL(clk_get_parent);



long clk_round_rate(struct clk *clk, unsigned long rate)

{

	if (!clk)

		return 0;



	if (likely(clk->ops && clk->ops->round_rate)) {

		unsigned long flags, rounded;
@@ -555,94 +567,6 @@ long clk_round_rate(struct clk *clk, unsigned long rate) 
}

EXPORT_SYMBOL_GPL(clk_round_rate);



long clk_round_parent(struct clk *clk, unsigned long target,

		      unsigned long *best_freq, unsigned long *parent_freq,

		      unsigned int div_min, unsigned int div_max)

{

	struct cpufreq_frequency_table *freq, *best = NULL;

	unsigned long error = ULONG_MAX, freq_high, freq_low, div;

	struct clk *parent = clk_get_parent(clk);



	if (!parent) {

		*parent_freq = 0;

		*best_freq = clk_round_rate(clk, target);

		return abs(target - *best_freq);

	}



	cpufreq_for_each_valid_entry(freq, parent->freq_table) {

		if (unlikely(freq->frequency / target <= div_min - 1)) {

			unsigned long freq_max;



			freq_max = (freq->frequency + div_min / 2) / div_min;

			if (error > target - freq_max) {

				error = target - freq_max;

				best = freq;

				if (best_freq)

					*best_freq = freq_max;

			}



			pr_debug("too low freq %u, error %lu\n", freq->frequency,

				 target - freq_max);



			if (!error)

				break;



			continue;

		}



		if (unlikely(freq->frequency / target >= div_max)) {

			unsigned long freq_min;



			freq_min = (freq->frequency + div_max / 2) / div_max;

			if (error > freq_min - target) {

				error = freq_min - target;

				best = freq;

				if (best_freq)

					*best_freq = freq_min;

			}



			pr_debug("too high freq %u, error %lu\n", freq->frequency,

				 freq_min - target);



			if (!error)

				break;



			continue;

		}



		div = freq->frequency / target;

		freq_high = freq->frequency / div;

		freq_low = freq->frequency / (div + 1);



		if (freq_high - target < error) {

			error = freq_high - target;

			best = freq;

			if (best_freq)

				*best_freq = freq_high;

		}



		if (target - freq_low < error) {

			error = target - freq_low;

			best = freq;

			if (best_freq)

				*best_freq = freq_low;

		}



		pr_debug("%u / %lu = %lu, / %lu = %lu, best %lu, parent %u\n",

			 freq->frequency, div, freq_high, div + 1, freq_low,

			 *best_freq, best->frequency);



		if (!error)

			break;

	}



	if (parent_freq)

		*parent_freq = best->frequency;



	return error;

}

EXPORT_SYMBOL_GPL(clk_round_parent);



#ifdef CONFIG_PM

static void clks_core_resume(void)

{

include/linux/sh_clk.h

+0 −4
Original line number Diff line number Diff line
@@ -113,10 +113,6 @@ long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, 
long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min,

			       unsigned int mult_max, unsigned long rate);



long clk_round_parent(struct clk *clk, unsigned long target,

		      unsigned long *best_freq, unsigned long *parent_freq,

		      unsigned int div_min, unsigned int div_max);



#define SH_CLK_MSTP(_parent, _enable_reg, _enable_bit, _status_reg, _flags) \

{									\

	.parent		= _parent,					\