Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 34eaed4e authored by Raghu Ananya Arabolu's avatar Raghu Ananya Arabolu
Browse files

msm: kgsl: Enable GMU processor clock gating 



When the GMU enters the wait-for-interrupt state (WFI), the processor
clock should be gated to save power. Write the GMU_WFI_CONFIG register
to do this when we set up hardware clock gating.

Change-Id: Id97406a3e5ab9bb8a38c4a9289b9d99ce61ce2ab
Signed-off-by: default avatarRaghu Ananya Arabolu <rarabolu@codeaurora.org>
parent b69b913a

drivers/gpu/msm/adreno_a6xx.c

+11 −0
Original line number Diff line number Diff line
@@ -739,6 +739,15 @@ __get_gmu_ao_cgc_hyst_cntl(struct adreno_device *adreno_dev) 
		return 0x00005555;

}



static unsigned int __get_gmu_wfi_config(struct adreno_device *adreno_dev)

{

	if (adreno_is_a620(adreno_dev) || adreno_is_a640(adreno_dev) ||

		adreno_is_a650(adreno_dev))

		return 0x00000002;



	return 0x00000000;

}



static void a6xx_hwcg_set(struct adreno_device *adreno_dev, bool on)

{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
@@ -756,6 +765,8 @@ static void a6xx_hwcg_set(struct adreno_device *adreno_dev, bool on) 
			on ? __get_gmu_ao_cgc_delay_cntl(adreno_dev) : 0);

		gmu_core_regwrite(device, A6XX_GPU_GMU_AO_GMU_CGC_HYST_CNTL,

			on ? __get_gmu_ao_cgc_hyst_cntl(adreno_dev) : 0);

		gmu_core_regwrite(device, A6XX_GMU_CX_GMU_WFI_CONFIG,

			on ? __get_gmu_wfi_config(adreno_dev) : 0);

	}



	kgsl_regread(device, A6XX_RBBM_CLOCK_CNTL, &value);

drivers/gpu/msm/adreno_a6xx_gmu.c

+0 −2
Original line number Diff line number Diff line
@@ -319,8 +319,6 @@ static int a6xx_gmu_start(struct kgsl_device *device) 
		mask = 0xFFFFFFFF;

	}



	kgsl_regwrite(device, A6XX_GMU_CX_GMU_WFI_CONFIG, 0x0);



	/* Set the log wptr index */

	gmu_core_regwrite(device, A6XX_GPU_GMU_CX_GMU_PWR_COL_CP_RESP,

			gmu->log_wptr_retention);