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Commit 3453ca9e authored by Sergei Shtylyov's avatar Sergei Shtylyov Committed by Simon Horman
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ARM: shmobile: r8a7790: add ADSP clocks 



Add the ADSP clocks to the CPG and MSTP5 nodes of the R8A7790 device tree.

Based on the original patch by Konstantin Kozhevnikov
<konstantin.kozhevnikov@cogentembedded.com>.

Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent ae65a8ae

arch/arm/boot/dts/r8a7790.dtsi

+7 −4
Original line number Diff line number Diff line
@@ -885,7 +885,7 @@ 
			#clock-cells = <1>;

			clock-output-names = "main", "pll0", "pll1", "pll3",

					     "lb", "qspi", "sdh", "sd0", "sd1",

					     "z", "rcan";

					     "z", "rcan", "adsp";

		};



		/* Variable factor clocks */
@@ -1159,13 +1159,16 @@ 
		mstp5_clks: mstp5_clks@e6150144 {

			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";

			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;

			clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;

			clocks = <&hp_clk>, <&hp_clk>, <&cpg_clocks R8A7790_CLK_ADSP>,

				 <&extal_clk>, <&p_clk>;

			#clock-cells = <1>;

			clock-indices = <

				R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1

				R8A7790_CLK_THERMAL R8A7790_CLK_PWM

				R8A7790_CLK_ADSP_MOD R8A7790_CLK_THERMAL

				R8A7790_CLK_PWM

			>;

			clock-output-names = "audmac0", "audmac1", "thermal", "pwm";

			clock-output-names = "audmac0", "audmac1", "adsp_mod",

					     "thermal", "pwm";

		};

		mstp7_clks: mstp7_clks@e615014c {

			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";

include/dt-bindings/clock/r8a7790-clock.h

+2 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#define R8A7790_CLK_SD1			8

#define R8A7790_CLK_Z			9

#define R8A7790_CLK_RCAN		10

#define R8A7790_CLK_ADSP		11



/* MSTP0 */

#define R8A7790_CLK_MSIOF0		0
@@ -81,6 +82,7 @@ 
/* MSTP5 */

#define R8A7790_CLK_AUDIO_DMAC1		1

#define R8A7790_CLK_AUDIO_DMAC0		2

#define R8A7790_CLK_ADSP_MOD		6

#define R8A7790_CLK_THERMAL		22

#define R8A7790_CLK_PWM			23