Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 340b3a5b authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC fixes from Olof Johansson:
 "We didn't have a batch last week, so this one is slightly larger.

  None of them are scary though, a handful of fixes for small DT pieces,
  replacing properties with newer conventions.

  Highlights:
   - N900 fix for setting system revision
   - onenand init fix to avoid filesystem corruption
   - Clock fix for audio on Beaglebone-x15
   - Fixes on shmobile to deal with CONFIG_DEBUG_RODATA (default y in 4.6)

  + misc smaller stuff"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  MAINTAINERS: Extend info, add wiki and ml for meson arch
  MAINTAINERS: alpine: add a new maintainer and update the entry
  ARM: at91/dt: fix typo in sama5d2 pinmux descriptions
  ARM: OMAP2+: Fix onenand initialization to avoid filesystem corruption
  Revert "regulator: tps65217: remove tps65217.dtsi file"
  ARM: shmobile: Remove shmobile_boot_arg
  ARM: shmobile: Move shmobile_smp_{mpidr, fn, arg}[] from .text to .bss
  ARM: shmobile: r8a7779: Remove remainings of removed SCU boot setup code
  ARM: shmobile: Move shmobile_scu_base from .text to .bss
  ARM: OMAP2+: Fix omap_device for module reload on PM runtime forbid
  ARM: OMAP2+: Improve omap_device error for driver writers
  ARM: DTS: am57xx-beagle-x15: Select SYS_CLK2 for audio clocks
  ARM: dts: am335x/am57xx: replace gpio-key,wakeup with wakeup-source property
  ARM: OMAP2+: Set system_rev from ATAGS for n900
  ARM: dts: orion5x: fix the missing mtd flash on linkstation lswtgl
  ARM: dts: kirkwood: use unique machine name for ds112
  ARM: dts: imx6: remove bogus interrupt-parent from CAAM node
parents 691429e1 d877a214
Loading
Loading
Loading
Loading
+0 −10
Original line number Diff line number Diff line
@@ -26,11 +26,7 @@ Example:
		ti,pmic-shutdown-controller;

		regulators {
			#address-cells = <1>;
			#size-cells = <0>;

			dcdc1_reg: dcdc1 {
				reg = <0>;
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
@@ -38,7 +34,6 @@ Example:
			};

			dcdc2_reg: dcdc2 {
				reg = <1>;
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
@@ -46,7 +41,6 @@ Example:
			};

			dcdc3_reg: dcc3 {
				reg = <2>;
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1500000>;
				regulator-boot-on;
@@ -54,7 +48,6 @@ Example:
			};

			ldo1_reg: ldo1 {
				reg = <3>;
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
@@ -62,7 +55,6 @@ Example:
			};

			ldo2_reg: ldo2 {
				reg = <4>;
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
@@ -70,7 +62,6 @@ Example:
			};

			ldo3_reg: ldo3 {
				reg = <5>;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
@@ -78,7 +69,6 @@ Example:
			};

			ldo4_reg: ldo4 {
				reg = <6>;
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
+10 −3
Original line number Diff line number Diff line
@@ -920,17 +920,24 @@ M: Emilio López <emilio@elopez.com.ar>
S:	Maintained
F:	drivers/clk/sunxi/

ARM/Amlogic MesonX SoC support
ARM/Amlogic Meson SoC support
M:	Carlo Caione <carlo@caione.org>
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L:	linux-meson@googlegroups.com
W:	http://linux-meson.com/
S:	Maintained
F:	drivers/media/rc/meson-ir.c
N:	meson[x68]
F:	arch/arm/mach-meson/
F:	arch/arm/boot/dts/meson*
N:	meson

ARM/Annapurna Labs ALPINE ARCHITECTURE
M:	Tsahee Zidenberg <tsahee@annapurnalabs.com>
M:	Antoine Tenart <antoine.tenart@free-electrons.com>
S:	Maintained
F:	arch/arm/mach-alpine/
F:	arch/arm/boot/dts/alpine*
F:	arch/arm64/boot/dts/al/
F:	drivers/*/*alpine*

ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
M:	Nicolas Ferre <nicolas.ferre@atmel.com>
+3 −11
Original line number Diff line number Diff line
@@ -285,8 +285,10 @@
	};
};


/include/ "tps65217.dtsi"

&tps {
	compatible = "ti,tps65217";
	/*
	 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
	 * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
@@ -307,17 +309,12 @@
	ti,pmic-shutdown-controller;

	regulators {
		#address-cells = <1>;
		#size-cells = <0>;

		dcdc1_reg: regulator@0 {
			reg = <0>;
			regulator-name = "vdds_dpr";
			regulator-always-on;
		};

		dcdc2_reg: regulator@1 {
			reg = <1>;
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <925000>;
@@ -327,7 +324,6 @@
		};

		dcdc3_reg: regulator@2 {
			reg = <2>;
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <925000>;
@@ -337,25 +333,21 @@
		};

		ldo1_reg: regulator@3 {
			reg = <3>;
			regulator-name = "vio,vrtc,vdds";
			regulator-always-on;
		};

		ldo2_reg: regulator@4 {
			reg = <4>;
			regulator-name = "vdd_3v3aux";
			regulator-always-on;
		};

		ldo3_reg: regulator@5 {
			reg = <5>;
			regulator-name = "vdd_1v8";
			regulator-always-on;
		};

		ldo4_reg: regulator@6 {
			reg = <6>;
			regulator-name = "vdd_3v3a";
			regulator-always-on;
		};
+2 −12
Original line number Diff line number Diff line
@@ -128,21 +128,16 @@

};

&tps {
	compatible = "ti,tps65217";
/include/ "tps65217.dtsi"

&tps {
	regulators {
		#address-cells = <1>;
		#size-cells = <0>;

		dcdc1_reg: regulator@0 {
			reg = <0>;
			regulator-name = "vdds_dpr";
			regulator-always-on;
		};

		dcdc2_reg: regulator@1 {
			reg = <1>;
			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <925000>;
@@ -152,7 +147,6 @@
		};

		dcdc3_reg: regulator@2 {
			reg = <2>;
			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <925000>;
@@ -162,28 +156,24 @@
		};

		ldo1_reg: regulator@3 {
			reg = <3>;
			regulator-name = "vio,vrtc,vdds";
			regulator-boot-on;
			regulator-always-on;
		};

		ldo2_reg: regulator@4 {
			reg = <4>;
			regulator-name = "vdd_3v3aux";
			regulator-boot-on;
			regulator-always-on;
		};

		ldo3_reg: regulator@5 {
			reg = <5>;
			regulator-name = "vdd_1v8";
			regulator-boot-on;
			regulator-always-on;
		};

		ldo4_reg: regulator@6 {
			reg = <6>;
			regulator-name = "vdd_3v3d";
			regulator-boot-on;
			regulator-always-on;
+2 −12
Original line number Diff line number Diff line
@@ -375,15 +375,11 @@
	wp-gpios = <&gpio3 18 0>;
};

&tps {
	compatible = "ti,tps65217";
#include "tps65217.dtsi"

&tps {
	regulators {
		#address-cells = <1>;
		#size-cells = <0>;

		dcdc1_reg: regulator@0 {
			reg = <0>;
			/* +1.5V voltage with ±4% tolerance */
			regulator-min-microvolt = <1450000>;
			regulator-max-microvolt = <1550000>;
@@ -392,7 +388,6 @@
		};

		dcdc2_reg: regulator@1 {
			reg = <1>;
			/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
			regulator-name = "vdd_mpu";
			regulator-min-microvolt = <915000>;
@@ -402,7 +397,6 @@
		};

		dcdc3_reg: regulator@2 {
			reg = <2>;
			/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
			regulator-name = "vdd_core";
			regulator-min-microvolt = <915000>;
@@ -412,7 +406,6 @@
		};

		ldo1_reg: regulator@3 {
			reg = <3>;
			/* +1.8V voltage with ±4% tolerance */
			regulator-min-microvolt = <1750000>;
			regulator-max-microvolt = <1870000>;
@@ -421,7 +414,6 @@
		};

		ldo2_reg: regulator@4 {
			reg = <4>;
			/* +3.3V voltage with ±4% tolerance */
			regulator-min-microvolt = <3175000>;
			regulator-max-microvolt = <3430000>;
@@ -430,7 +422,6 @@
		};

		ldo3_reg: regulator@5 {
			reg = <5>;
			/* +1.8V voltage with ±4% tolerance */
			regulator-min-microvolt = <1750000>;
			regulator-max-microvolt = <1870000>;
@@ -439,7 +430,6 @@
		};

		ldo4_reg: regulator@6 {
			reg = <6>;
			/* +3.3V voltage with ±4% tolerance */
			regulator-min-microvolt = <3175000>;
			regulator-max-microvolt = <3430000>;
Loading