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Commit 33f8a045 authored by David S. Miller's avatar David S. Miller
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Merge tag 'wireless-drivers-next-for-davem-2016-11-25' of...

Merge tag 'wireless-drivers-next-for-davem-2016-11-25' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next



Kalle Valo says:

====================
wireless-drivers-next patches for 4.10

Major changes:

iwlwifi

* finalize and enable dynamic queue allocation
* use dev_coredumpmsg() to prevent locking the driver
* small fix to pass the AID to the FW
* use FW PS decisions with multi-queue

ath9k

* add device tree bindings
* switch to use mac80211 intermediate software queues to reduce
  latency and fix bufferbloat

wl18xx

* allow scanning in AP mode
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 5a717f4f 159a55a6
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+5 −3
Original line number Diff line number Diff line
Marvell 8897/8997 (sd8897/sd8997) SDIO devices
Marvell 8897/8997 (sd8897/sd8997/pcie8997) SDIO/PCIE devices
------

This node provides properties for controlling the marvell sdio wireless device.
The node is expected to be specified as a child node to the SDIO controller that
This node provides properties for controlling the Marvell SDIO/PCIE wireless device.
The node is expected to be specified as a child node to the SDIO/PCIE controller that
connects the device to the system.

Required properties:
@@ -10,6 +10,8 @@ Required properties:
  - compatible : should be one of the following:
	* "marvell,sd8897"
	* "marvell,sd8997"
	* "pci11ab,2b42"
	* "pci1b4b,2b42"

Optional properties:

+48 −0
Original line number Diff line number Diff line
* Qualcomm Atheros ath9k wireless devices

This node provides properties for configuring the ath9k wireless device. The
node is expected to be specified as a child node of the PCI controller to
which the wireless chip is connected.

Required properties:
- compatible: For PCI and PCIe devices this should be an identifier following
		the format as defined in "PCI Bus Binding to Open Firmware"
		Revision 2.1. One of the possible formats is "pciVVVV,DDDD"
		where VVVV is the PCI vendor ID and DDDD is PCI device ID.
		Typically QCA's PCI vendor ID 168c is used while the PCI device
		ID depends on the chipset - see the following (possibly
		incomplete) list:
			- 0023 for AR5416
			- 0024 for AR5418
			- 0027 for AR9160
			- 0029 for AR9220 and AR9223
			- 002a for AR9280 and AR9283
			- 002b for AR9285
			- 002c for AR2427
			- 002d for AR9227
			- 002e for AR9287
			- 0030 for AR9380, AR9381 and AR9382
			- 0032 for AR9485
			- 0033 for AR9580 and AR9590
			- 0034 for AR9462
			- 0036 for AR9565
			- 0037 for AR9485
- reg: Address and length of the register set for the device.

Optional properties:
- qca,no-eeprom: Indicates that there is no physical EEPROM connected to the
			ath9k wireless chip (in this case the calibration /
			EEPROM data will be loaded from userspace using the
			kernel firmware loader).
- mac-address: See ethernet.txt in the parent directory
- local-mac-address: See ethernet.txt in the parent directory


In this example, the node is defined as child node of the PCI controller:
&pci0 {
	wifi@168c,002d {
		compatible = "pci168c,002d";
		reg = <0x7000 0 0 0 0x1000>;
		qca,no-eeprom;
	};
};
+6 −0
Original line number Diff line number Diff line
@@ -327,4 +327,10 @@ static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode)
}
#endif

extern const char *ath_bus_type_strings[];
static inline const char *ath_bus_type_to_string(enum ath_bus_type bustype)
{
	return ath_bus_type_strings[bustype];
}

#endif /* ATH_H */
+13 −0
Original line number Diff line number Diff line
@@ -198,6 +198,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.name = "qca9984/qca9994 hw1.0",
		.patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
		.uart_pin = 7,
		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
		.otp_exe_param = 0x00000700,
		.continuous_frag_desc = true,
		.cck_rate_map_rev2 = true,
@@ -223,6 +224,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
		.name = "qca9888 hw2.0",
		.patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
		.uart_pin = 7,
		.cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
		.otp_exe_param = 0x00000700,
		.continuous_frag_desc = true,
		.channel_counters_freq_hz = 150000,
@@ -1560,6 +1562,15 @@ static void ath10k_core_restart(struct work_struct *work)
	mutex_unlock(&ar->conf_mutex);
}

static void ath10k_core_set_coverage_class_work(struct work_struct *work)
{
	struct ath10k *ar = container_of(work, struct ath10k,
					 set_coverage_class_work);

	if (ar->hw_params.hw_ops->set_coverage_class)
		ar->hw_params.hw_ops->set_coverage_class(ar, -1);
}

static int ath10k_core_init_firmware_features(struct ath10k *ar)
{
	struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
@@ -2342,6 +2353,8 @@ struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,

	INIT_WORK(&ar->register_work, ath10k_core_register_work);
	INIT_WORK(&ar->restart_work, ath10k_core_restart);
	INIT_WORK(&ar->set_coverage_class_work,
		  ath10k_core_set_coverage_class_work);

	init_dummy_netdev(&ar->napi_dev);

+16 −4
Original line number Diff line number Diff line
@@ -557,10 +557,8 @@ enum ath10k_fw_features {
	 */
	ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,

	/* Older firmware with HTT delivers incorrect tx status for null func
	 * frames to driver, but this fixed in 10.2 and 10.4 firmware versions.
	 * Also this workaround results in reporting of incorrect null func
	 * status for 10.4. This flag is used to skip the workaround.
	/* Unused flag and proven to be not working, enable this if you want
	 * to experiment sending NULL func data frames in HTT TX
	 */
	ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,

@@ -714,6 +712,7 @@ struct ath10k {
	u32 phy_capability;
	u32 hw_min_tx_power;
	u32 hw_max_tx_power;
	u32 hw_eeprom_rd;
	u32 ht_cap_info;
	u32 vht_cap_info;
	u32 num_rf_chains;
@@ -912,6 +911,19 @@ struct ath10k {
	struct net_device napi_dev;
	struct napi_struct napi;

	struct work_struct set_coverage_class_work;
	/* protected by conf_mutex */
	struct {
		/* writing also protected by data_lock */
		s16 coverage_class;

		u32 reg_phyclk;
		u32 reg_slottime_conf;
		u32 reg_slottime_orig;
		u32 reg_ack_cts_timeout_conf;
		u32 reg_ack_cts_timeout_orig;
	} fw_coverage;

	/* must be last */
	u8 drv_priv[0] __aligned(sizeof(void *));
};
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