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Commit 337b07af authored by Puranam V G Tejaswi's avatar Puranam V G Tejaswi Committed by Gerrit - the friendly Code Review server
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msm: kgsl: capture more debugbus registers in a702 snapshot



Capture the debugbus registers of the block A6XX_DBGBUS_SPTP_0,
which are required to get more information on SP. Also capture
the registers of A6XX_DBGBUS_COM_1 to get MHUB related
information.

Change-Id: Ic68e7bbdd878e88cf4b9aa079544b09ea81038ec
Signed-off-by: default avatarPuranam V G Tejaswi <pvgtejas@codeaurora.org>
parent e117350b
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+15 −0
Original line number Diff line number Diff line
@@ -404,6 +404,7 @@ enum a6xx_debugbus_id {
	A6XX_DBGBUS_RAS          = 0xc,
	A6XX_DBGBUS_VSC          = 0xd,
	A6XX_DBGBUS_COM          = 0xe,
	A6XX_DBGBUS_COM_1        = 0xf,
	A6XX_DBGBUS_LRZ          = 0x10,
	A6XX_DBGBUS_A2D          = 0x11,
	A6XX_DBGBUS_CCUFCHE      = 0x12,
@@ -515,6 +516,11 @@ static const struct adreno_debugbus_block a650_dbgc_debugbus_blocks[] = {
	{ A6XX_DBGBUS_SPTP_5, 0x100, },
};

static const struct adreno_debugbus_block a702_dbgc_debugbus_blocks[] = {
	{ A6XX_DBGBUS_COM_1, 0x100, },
	{ A6XX_DBGBUS_SPTP_0, 0x100, },
};

#define A6XX_NUM_SHADER_BANKS 3
#define A6XX_SHADER_STATETYPE_SHIFT 8

@@ -1528,6 +1534,15 @@ static void a6xx_snapshot_debugbus(struct adreno_device *adreno_dev,
		}
	}

	if (adreno_is_a702(adreno_dev)) {
		for (i = 0; i < ARRAY_SIZE(a702_dbgc_debugbus_blocks); i++) {
			kgsl_snapshot_add_section(device,
				KGSL_SNAPSHOT_SECTION_DEBUGBUS,
				snapshot, a6xx_snapshot_dbgc_debugbus_block,
				(void *) &a702_dbgc_debugbus_blocks[i]);
		}
	}

	/*
	 * GBIF has same debugbus as of other GPU blocks hence fall back to
	 * default path if GPU uses GBIF.