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Commit 323301af authored by Nabendu Maiti's avatar Nabendu Maiti Committed by Paulo Zanoni
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drm/i915/icl: Added 5k source scaling support for Gen11 platform 



Gen11 supports upto 5k source scaling

v2: Re-factoring of code as per review
v3: Corrected max Vertical size and indentation
v4: Added max Vertical dst size in same patch

Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarNabendu Maiti <nabendu.bikash.maiti@intel.com>
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180323172419.24911-7-paulo.r.zanoni@intel.com
parent 96ae4831

drivers/gpu/drm/i915/intel_display.c

+7 −4
Original line number Diff line number Diff line
@@ -4757,9 +4757,12 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, 
	/* range checks */

	if (src_w < SKL_MIN_SRC_W || src_h < SKL_MIN_SRC_H ||

	    dst_w < SKL_MIN_DST_W || dst_h < SKL_MIN_DST_H ||



		src_w > SKL_MAX_SRC_W || src_h > SKL_MAX_SRC_H ||

		dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H) {

	    (IS_GEN11(dev_priv) &&

	     (src_w > ICL_MAX_SRC_W || src_h > ICL_MAX_SRC_H ||

	      dst_w > ICL_MAX_DST_W || dst_h > ICL_MAX_DST_H)) ||

	    (!IS_GEN11(dev_priv) &&

	     (src_w > SKL_MAX_SRC_W || src_h > SKL_MAX_SRC_H ||

	      dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H)))	{

		DRM_DEBUG_KMS("scaler_user index %u.%u: src %ux%u dst %ux%u "

			"size is out of scaler range\n",

			intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h);

drivers/gpu/drm/i915/intel_drv.h

+4 −0
Original line number Diff line number Diff line
@@ -548,6 +548,10 @@ struct intel_initial_plane_config { 
#define SKL_MAX_DST_W 4096

#define SKL_MIN_DST_H 8

#define SKL_MAX_DST_H 4096

#define ICL_MAX_SRC_W 5120

#define ICL_MAX_SRC_H 4096

#define ICL_MAX_DST_W 5120

#define ICL_MAX_DST_H 4096



struct intel_scaler {

	int in_use;