Merge "ARM: dts: msm: Add support for ESD and DFPS on scuba"

&dsi_nt36525_truly_video {

	qcom,mdss-dsi-t-clk-post = <0x0a>;

	qcom,mdss-dsi-t-clk-pre = <0x21>;

	qcom,esd-check-enabled;

	qcom,mdss-dsi-panel-status-check-mode = "reg_read";

	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];

	qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";

	qcom,mdss-dsi-panel-status-value = <0x9c>;

	qcom,mdss-dsi-panel-on-check-value = <0x9c>;

	qcom,mdss-dsi-panel-status-read-length = <1>;

	qcom,dsi-supported-dfps-list = <60 55 48>;

	qcom,mdss-dsi-pan-enable-dynamic-fps;

	qcom,mdss-dsi-pan-fps-update =

		"dfps_immediate_porch_mode_vfp";

	qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",

				"src_byte_clk0", "src_pixel_clk0",

				"shadow_byte_clk0", "shadow_pixel_clk0";

	qcom,dsi-dyn-clk-enable;

	qcom,dsi-dyn-clk-list =

		<497016000 499086904 501157800 503228704>;

	qcom,dsi-dyn-clk-type = "constant-fps-adjust-vfp";

	qcom,mdss-dsi-display-timings {

		timing@0 {

			qcom,mdss-dsi-panel-phy-timings =

		clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>;

		clock-names = "iface_clk";

		clock-rate = <0>;

		memory-region = <&dfps_data_memory>;

		gdsc-supply = <&mdss_core_gdsc>;

		qcom,dsi-pll-ssc-en;

		qcom,dsi-pll-ssc-mode = "down-spread";

			label = "cont_splash_region";

		};

		dfps_data_memory: dfps_data_region@9cf00000 {

			reg = <0x0 0x9cf00000 0x0 0x0100000>;

			label = "dfps_data_region";

		};

		user_contig_mem: user_contig_region {

			compatible = "shared-dma-pool";

			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;