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Commit 31d4a5cc authored by Srinivas Ramana's avatar Srinivas Ramana Committed by Chandra Sai Chidipudi
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arch: arm64: Add midr values for kryo2xx big cores 



Add midr value for kryo2xx big cores to apply errata workarounds for
branch prediction hardening.

Change-Id: I7ca9cfa3e6b48d5af78a5297cb76ebe6f52e519e
Signed-off-by: default avatarSrinivas Ramana <sramana@codeaurora.org>
[gkohli@codeaurora.org: resolve trivial merge conflicts]
Signed-off-by: default avatarGaurav Kohli <gkohli@codeaurora.org>
[cchidipu@codeaurora.org: resolve trivial merge conflicts]
[cchidipu@codeaurora.org: Update midrs in arm64_bp_harden_smccc_cpus]
Signed-off-by: default avatarChandra Sai Chidipudi <cchidipu@codeaurora.org>
parent e01f3bd5

arch/arm64/include/asm/cputype.h

+2 −0
Original line number Diff line number Diff line
@@ -128,6 +128,8 @@ 
#define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO)

#define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER)

#define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL)

#define MIDR_KRYO2XX_GOLD \

	MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO2XX_GOLD)



#ifndef __ASSEMBLY__

arch/arm64/kernel/cpu_errata.c

+1 −0
Original line number Diff line number Diff line
@@ -534,6 +534,7 @@ static const struct midr_range arm64_bp_harden_smccc_cpus[] = { 
	MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR_V1),

	MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR),

	MIDR_ALL_VERSIONS(MIDR_NVIDIA_DENVER),

	MIDR_ALL_VERSIONS(MIDR_KRYO2XX_GOLD),

	{},

};