Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 30b7af25 authored by Noam Camus's avatar Noam Camus Committed by Vineet Gupta
Browse files

ARC: [plat-eznps] Fix TLB Errata 



Due to a HW bug in NPS400 we get from time to time false TLB miss.
Workaround this by validating each miss.

Signed-off-by: default avatarNoam Camus <noamca@mellanox.com>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 9e939552

arch/arc/mm/tlbex.S

+9 −0
Original line number Original line Diff line number Diff line
@@ -274,6 +274,13 @@ ex_saved_reg1: 
.macro COMMIT_ENTRY_TO_MMU

.macro COMMIT_ENTRY_TO_MMU

#if (CONFIG_ARC_MMU_VER < 4)

#if (CONFIG_ARC_MMU_VER < 4)





#ifdef CONFIG_EZNPS_MTM_EXT

	/* verify if entry for this vaddr+ASID already exists */

	sr    TLBProbe, [ARC_REG_TLBCOMMAND]

	lr    r0, [ARC_REG_TLBINDEX]

	bbit0 r0, 31, 88f

#endif



	/* Get free TLB slot: Set = computed from vaddr, way = random */

	/* Get free TLB slot: Set = computed from vaddr, way = random */

	sr  TLBGetIndex, [ARC_REG_TLBCOMMAND]

	sr  TLBGetIndex, [ARC_REG_TLBCOMMAND]
@@ -287,6 +294,8 @@ ex_saved_reg1: 
#else

#else

	sr TLBInsertEntry, [ARC_REG_TLBCOMMAND]

	sr TLBInsertEntry, [ARC_REG_TLBCOMMAND]

#endif

#endif



88:

.endm

.endm