Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3084eb00 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu/soc15: initialize reg base for vega12 



Initialize the IP offsets for vega12.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f559fe2b

drivers/gpu/drm/amd/amdgpu/soc15.c

+1 −0
Original line number Diff line number Diff line
@@ -508,6 +508,7 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) 
	/* Set IP register base before any HW register access */

	switch (adev->asic_type) {

	case CHIP_VEGA10:

	case CHIP_VEGA12:

	case CHIP_RAVEN:

		vega10_reg_base_init(adev);

		break;