ixgbevf: 82599 Virtual Function core functions and header

/*******************************************************************************

  Intel 82599 Virtual Function driver

  Copyright(c) 1999 - 2009 Intel Corporation.

  This program is free software; you can redistribute it and/or modify it

  under the terms and conditions of the GNU General Public License,

  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT

  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

  more details.

  You should have received a copy of the GNU General Public License along with

  this program; if not, write to the Free Software Foundation, Inc.,

  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in

  the file called "COPYING".

  Contact Information:

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

*******************************************************************************/

#include "vf.h"

/**

 *  ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx

 *  @hw: pointer to hardware structure

 *

 *  Starts the hardware by filling the bus info structure and media type, clears

 *  all on chip counters, initializes receive address registers, multicast

 *  table, VLAN filter table, calls routine to set up link and flow control

 *  settings, and leaves transmit and receive units disabled and uninitialized

 **/

static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)

{

	/* Clear adapter stopped flag */

	hw->adapter_stopped = false;

	return 0;

}

/**

 *  ixgbevf_init_hw_vf - virtual function hardware initialization

 *  @hw: pointer to hardware structure

 *

 *  Initialize the hardware by resetting the hardware and then starting

 *  the hardware

 **/

static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)

{

	s32 status = hw->mac.ops.start_hw(hw);

	hw->mac.ops.get_mac_addr(hw, hw->mac.addr);

	return status;

}

/**

 *  ixgbevf_reset_hw_vf - Performs hardware reset

 *  @hw: pointer to hardware structure

 *

 *  Resets the hardware by reseting the transmit and receive units, masks and

 *  clears all interrupts.

 **/

static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)

{

	struct ixgbe_mbx_info *mbx = &hw->mbx;

	u32 timeout = IXGBE_VF_INIT_TIMEOUT;

	s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;

	u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];

	u8 *addr = (u8 *)(&msgbuf[1]);

	/* Call adapter stop to disable tx/rx and clear interrupts */

	hw->mac.ops.stop_adapter(hw);

	IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);

	IXGBE_WRITE_FLUSH(hw);

	/* we cannot reset while the RSTI / RSTD bits are asserted */

	while (!mbx->ops.check_for_rst(hw) && timeout) {

		timeout--;

		udelay(5);

	}

	if (!timeout)

		return IXGBE_ERR_RESET_FAILED;

	/* mailbox timeout can now become active */

	mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;

	msgbuf[0] = IXGBE_VF_RESET;

	mbx->ops.write_posted(hw, msgbuf, 1);

	msleep(10);

	/* set our "perm_addr" based on info provided by PF */

	/* also set up the mc_filter_type which is piggy backed

	 * on the mac address in word 3 */

	ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);

	if (ret_val)

		return ret_val;

	if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))

		return IXGBE_ERR_INVALID_MAC_ADDR;

	memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);

	hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];

	return 0;

}

/**

 *  ixgbevf_stop_hw_vf - Generic stop Tx/Rx units

 *  @hw: pointer to hardware structure

 *

 *  Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,

 *  disables transmit and receive units. The adapter_stopped flag is used by

 *  the shared code and drivers to determine if the adapter is in a stopped

 *  state and should not touch the hardware.

 **/

static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)

{

	u32 number_of_queues;

	u32 reg_val;

	u16 i;

	/*

	 * Set the adapter_stopped flag so other driver functions stop touching

	 * the hardware

	 */

	hw->adapter_stopped = true;

	/* Disable the receive unit by stopped each queue */

	number_of_queues = hw->mac.max_rx_queues;

	for (i = 0; i < number_of_queues; i++) {

		reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));

		if (reg_val & IXGBE_RXDCTL_ENABLE) {

			reg_val &= ~IXGBE_RXDCTL_ENABLE;

			IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);

		}

	}

	IXGBE_WRITE_FLUSH(hw);

	/* Clear interrupt mask to stop from interrupts being generated */

	IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);

	/* Clear any pending interrupts */

	IXGBE_READ_REG(hw, IXGBE_VTEICR);

	/* Disable the transmit unit.  Each queue must be disabled. */

	number_of_queues = hw->mac.max_tx_queues;

	for (i = 0; i < number_of_queues; i++) {

		reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));

		if (reg_val & IXGBE_TXDCTL_ENABLE) {

			reg_val &= ~IXGBE_TXDCTL_ENABLE;

			IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);

		}

	}

	return 0;

}

/**

 *  ixgbevf_mta_vector - Determines bit-vector in multicast table to set

 *  @hw: pointer to hardware structure

 *  @mc_addr: the multicast address

 *

 *  Extracts the 12 bits, from a multicast address, to determine which

 *  bit-vector to set in the multicast table. The hardware uses 12 bits, from

 *  incoming rx multicast addresses, to determine the bit-vector to check in

 *  the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set

 *  by the MO field of the MCSTCTRL. The MO field is set during initialization

 *  to mc_filter_type.

 **/

static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)

{

	u32 vector = 0;

	switch (hw->mac.mc_filter_type) {

	case 0:   /* use bits [47:36] of the address */

		vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));

		break;

	case 1:   /* use bits [46:35] of the address */

		vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));

		break;

	case 2:   /* use bits [45:34] of the address */

		vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));

		break;

	case 3:   /* use bits [43:32] of the address */

		vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));

		break;

	default:  /* Invalid mc_filter_type */

		break;

	}

	/* vector can only be 12-bits or boundary will be exceeded */

	vector &= 0xFFF;

	return vector;

}

/**

 *  ixgbevf_get_mac_addr_vf - Read device MAC address

 *  @hw: pointer to the HW structure

 *  @mac_addr: pointer to storage for retrieved MAC address

 **/

static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)

{

	memcpy(mac_addr, hw->mac.perm_addr, IXGBE_ETH_LENGTH_OF_ADDRESS);

	return 0;

}

/**

 *  ixgbevf_set_rar_vf - set device MAC address

 *  @hw: pointer to hardware structure

 *  @index: Receive address register to write

 *  @addr: Address to put into receive address register

 *  @vmdq: Unused in this implementation

 **/

static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,

			      u32 vmdq)

{

	struct ixgbe_mbx_info *mbx = &hw->mbx;

	u32 msgbuf[3];

	u8 *msg_addr = (u8 *)(&msgbuf[1]);

	s32 ret_val;

	memset(msgbuf, 0, sizeof(msgbuf));

	msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;

	memcpy(msg_addr, addr, 6);

	ret_val = mbx->ops.write_posted(hw, msgbuf, 3);

	if (!ret_val)

		ret_val = mbx->ops.read_posted(hw, msgbuf, 3);

	msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;

	/* if nacked the address was rejected, use "perm_addr" */

	if (!ret_val &&

	    (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))

		ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);

	return ret_val;

}

/**

 *  ixgbevf_update_mc_addr_list_vf - Update Multicast addresses

 *  @hw: pointer to the HW structure

 *  @mc_addr_list: array of multicast addresses to program

 *  @mc_addr_count: number of multicast addresses to program

 *  @next: caller supplied function to return next address in list

 *

 *  Updates the Multicast Table Array.

 **/

static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,

					u32 mc_addr_count,

					ixgbe_mc_addr_itr next)

{

	struct ixgbe_mbx_info *mbx = &hw->mbx;

	u32 msgbuf[IXGBE_VFMAILBOX_SIZE];

	u16 *vector_list = (u16 *)&msgbuf[1];

	u32 vector;

	u32 cnt, i;

	u32 vmdq;

	/* Each entry in the list uses 1 16 bit word.  We have 30

	 * 16 bit words available in our HW msg buffer (minus 1 for the

	 * msg type).  That's 30 hash values if we pack 'em right.  If

	 * there are more than 30 MC addresses to add then punt the

	 * extras for now and then add code to handle more than 30 later.

	 * It would be unusual for a server to request that many multi-cast

	 * addresses except for in large enterprise network environments.

	 */

	cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;

	msgbuf[0] = IXGBE_VF_SET_MULTICAST;

	msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;

	for (i = 0; i < cnt; i++) {

		vector = ixgbevf_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));

		vector_list[i] = vector;

	}

	mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);

	return 0;

}

/**

 *  ixgbevf_set_vfta_vf - Set/Unset vlan filter table address

 *  @hw: pointer to the HW structure

 *  @vlan: 12 bit VLAN ID

 *  @vind: unused by VF drivers

 *  @vlan_on: if true then set bit, else clear bit

 **/

static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,

			       bool vlan_on)

{

	struct ixgbe_mbx_info *mbx = &hw->mbx;

	u32 msgbuf[2];

	msgbuf[0] = IXGBE_VF_SET_VLAN;

	msgbuf[1] = vlan;

	/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */

	msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;

	return mbx->ops.write_posted(hw, msgbuf, 2);

}

/**

 *  ixgbevf_setup_mac_link_vf - Setup MAC link settings

 *  @hw: pointer to hardware structure

 *  @speed: Unused in this implementation

 *  @autoneg: Unused in this implementation

 *  @autoneg_wait_to_complete: Unused in this implementation

 *

 *  Do nothing and return success.  VF drivers are not allowed to change

 *  global settings.  Maintained for driver compatibility.

 **/

static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,

				     ixgbe_link_speed speed, bool autoneg,

				     bool autoneg_wait_to_complete)

{

	return 0;

}

/**

 *  ixgbevf_check_mac_link_vf - Get link/speed status

 *  @hw: pointer to hardware structure

 *  @speed: pointer to link speed

 *  @link_up: true is link is up, false otherwise

 *  @autoneg_wait_to_complete: true when waiting for completion is needed

 *

 *  Reads the links register to determine if link is up and the current speed

 **/

static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,

				     ixgbe_link_speed *speed,

				     bool *link_up,

				     bool autoneg_wait_to_complete)

{

	u32 links_reg;

	if (!(hw->mbx.ops.check_for_rst(hw))) {

		*link_up = false;

		*speed = 0;

		return -1;

	}

	links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);

	if (links_reg & IXGBE_LINKS_UP)

		*link_up = true;

	else

		*link_up = false;

	if (links_reg & IXGBE_LINKS_SPEED)

		*speed = IXGBE_LINK_SPEED_10GB_FULL;

	else

		*speed = IXGBE_LINK_SPEED_1GB_FULL;

	return 0;

}

struct ixgbe_mac_operations ixgbevf_mac_ops = {

	.init_hw             = ixgbevf_init_hw_vf,

	.reset_hw            = ixgbevf_reset_hw_vf,

	.start_hw            = ixgbevf_start_hw_vf,

	.get_mac_addr        = ixgbevf_get_mac_addr_vf,

	.stop_adapter        = ixgbevf_stop_hw_vf,

	.setup_link          = ixgbevf_setup_mac_link_vf,

	.check_link          = ixgbevf_check_mac_link_vf,

	.set_rar             = ixgbevf_set_rar_vf,

	.update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,

	.set_vfta            = ixgbevf_set_vfta_vf,

};

struct ixgbevf_info ixgbevf_vf_info = {

	.mac = ixgbe_mac_82599_vf,

	.mac_ops = &ixgbevf_mac_ops,

};

/*******************************************************************************

  Intel 82599 Virtual Function driver

  Copyright(c) 1999 - 2009 Intel Corporation.

  This program is free software; you can redistribute it and/or modify it

  under the terms and conditions of the GNU General Public License,

  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT

  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

  more details.

  You should have received a copy of the GNU General Public License along with

  this program; if not, write to the Free Software Foundation, Inc.,

  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in

  the file called "COPYING".

  Contact Information:

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

*******************************************************************************/

#ifndef __IXGBE_VF_H__

#define __IXGBE_VF_H__

#include <linux/pci.h>

#include <linux/delay.h>

#include <linux/interrupt.h>

#include <linux/if_ether.h>

#include "defines.h"

#include "regs.h"

#include "mbx.h"

struct ixgbe_hw;

/* iterator type for walking multicast address lists */

typedef u8* (*ixgbe_mc_addr_itr) (struct ixgbe_hw *hw, u8 **mc_addr_ptr,

				  u32 *vmdq);

struct ixgbe_mac_operations {

	s32 (*init_hw)(struct ixgbe_hw *);

	s32 (*reset_hw)(struct ixgbe_hw *);

	s32 (*start_hw)(struct ixgbe_hw *);

	s32 (*clear_hw_cntrs)(struct ixgbe_hw *);

	enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);

	u32 (*get_supported_physical_layer)(struct ixgbe_hw *);

	s32 (*get_mac_addr)(struct ixgbe_hw *, u8 *);

	s32 (*stop_adapter)(struct ixgbe_hw *);

	s32 (*get_bus_info)(struct ixgbe_hw *);

	/* Link */

	s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool, bool);

	s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool);

	s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *,

				     bool *);

	/* RAR, Multicast, VLAN */

	s32 (*set_rar)(struct ixgbe_hw *, u32, u8 *, u32);

	s32 (*init_rx_addrs)(struct ixgbe_hw *);

	s32 (*update_mc_addr_list)(struct ixgbe_hw *, u8 *, u32,

				   ixgbe_mc_addr_itr);

	s32 (*enable_mc)(struct ixgbe_hw *);

	s32 (*disable_mc)(struct ixgbe_hw *);

	s32 (*clear_vfta)(struct ixgbe_hw *);

	s32 (*set_vfta)(struct ixgbe_hw *, u32, u32, bool);

};

enum ixgbe_mac_type {

	ixgbe_mac_unknown = 0,

	ixgbe_mac_82599_vf,

	ixgbe_num_macs

};

struct ixgbe_mac_info {

	struct ixgbe_mac_operations ops;

	u8 addr[6];

	u8 perm_addr[6];

	enum ixgbe_mac_type type;

	s32  mc_filter_type;

	bool get_link_status;

	u32  max_tx_queues;

	u32  max_rx_queues;

	u32  max_msix_vectors;

};

struct ixgbe_mbx_operations {

	s32 (*init_params)(struct ixgbe_hw *hw);

	s32 (*read)(struct ixgbe_hw *, u32 *, u16);

	s32 (*write)(struct ixgbe_hw *, u32 *, u16);

	s32 (*read_posted)(struct ixgbe_hw *, u32 *, u16);

	s32 (*write_posted)(struct ixgbe_hw *, u32 *, u16);

	s32 (*check_for_msg)(struct ixgbe_hw *);

	s32 (*check_for_ack)(struct ixgbe_hw *);

	s32 (*check_for_rst)(struct ixgbe_hw *);

};

struct ixgbe_mbx_stats {

	u32 msgs_tx;

	u32 msgs_rx;

	u32 acks;

	u32 reqs;

	u32 rsts;

};

struct ixgbe_mbx_info {

	struct ixgbe_mbx_operations ops;

	struct ixgbe_mbx_stats stats;

	u32 timeout;

	u32 udelay;

	u32 v2p_mailbox;

	u16 size;

};

struct ixgbe_hw {

	void *back;

	u8 __iomem *hw_addr;

	u8 *flash_address;

	unsigned long io_base;

	struct ixgbe_mac_info mac;

	struct ixgbe_mbx_info mbx;

	u16 device_id;

	u16 subsystem_vendor_id;

	u16 subsystem_device_id;

	u16 vendor_id;

	u8  revision_id;

	bool adapter_stopped;

};

struct ixgbevf_hw_stats {

	u64 base_vfgprc;

	u64 base_vfgptc;

	u64 base_vfgorc;

	u64 base_vfgotc;

	u64 base_vfmprc;

	u64 last_vfgprc;

	u64 last_vfgptc;

	u64 last_vfgorc;

	u64 last_vfgotc;

	u64 last_vfmprc;

	u64 vfgprc;

	u64 vfgptc;

	u64 vfgorc;

	u64 vfgotc;

	u64 vfmprc;

};

struct ixgbevf_info {

	enum ixgbe_mac_type		mac;

	struct ixgbe_mac_operations	*mac_ops;

};

#endif /* __IXGBE_VF_H__ */