Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2fd37208 authored by Tim Sander's avatar Tim Sander Committed by Dinh Nguyen
Browse files

ARM: dts: socfpga: add i2c reset signals 



Add the reset signals for the i2c controllers on Cyclone5-based
SoCFPGA boards to the dtsi.

Signed-off-by: default avatarTim Sander <tim.sander@hbm.com>
Signed-off-by: default avatarSteffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent 33af8ca0

arch/arm/boot/dts/socfpga.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -651,6 +651,7 @@ 
			#size-cells = <0>;

			compatible = "snps,designware-i2c";

			reg = <0xffc04000 0x1000>;

			resets = <&rst I2C0_RESET>;

			clocks = <&l4_sp_clk>;

			interrupts = <0 158 0x4>;

			status = "disabled";
@@ -661,6 +662,7 @@ 
			#size-cells = <0>;

			compatible = "snps,designware-i2c";

			reg = <0xffc05000 0x1000>;

			resets = <&rst I2C1_RESET>;

			clocks = <&l4_sp_clk>;

			interrupts = <0 159 0x4>;

			status = "disabled";
@@ -671,6 +673,7 @@ 
			#size-cells = <0>;

			compatible = "snps,designware-i2c";

			reg = <0xffc06000 0x1000>;

			resets = <&rst I2C2_RESET>;

			clocks = <&l4_sp_clk>;

			interrupts = <0 160 0x4>;

			status = "disabled";
@@ -681,6 +684,7 @@ 
			#size-cells = <0>;

			compatible = "snps,designware-i2c";

			reg = <0xffc07000 0x1000>;

			resets = <&rst I2C3_RESET>;

			clocks = <&l4_sp_clk>;

			interrupts = <0 161 0x4>;

			status = "disabled";