Loading Documentation/edac.txt +4 −4 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ csrow3. The representation of the above is reflected in the directory tree in EDAC's sysfs interface. Starting in directory /sys/devices/system/edac/mc each memory controller will be represented by its own 'mcX' directory, where 'X" is the index of the MC. by its own 'mcX' directory, where 'X' is the index of the MC. ..../edac/mc/ Loading @@ -207,7 +207,7 @@ by its own 'mcX' directory, where 'X" is the index of the MC. .... Under each 'mcX' directory each 'csrowX' is again represented by a 'csrowX', where 'X" is the csrow index: 'csrowX', where 'X' is the csrow index: .../mc/mc0/ Loading @@ -232,7 +232,7 @@ EDAC control and attribute files. In 'mcX' directories are EDAC control and attribute files for this 'X" instance of the memory controllers: this 'X' instance of the memory controllers: Counter reset control file: Loading Loading @@ -343,7 +343,7 @@ Sdram memory scrubbing rate: 'csrowX' DIRECTORIES In the 'csrowX' directories are EDAC control and attribute files for this 'X" instance of csrow: this 'X' instance of csrow: Total Uncorrectable Errors count attribute file: Loading Documentation/networking/ip-sysctl.txt +1 −0 Original line number Diff line number Diff line Loading @@ -144,6 +144,7 @@ tcp_adv_win_scale - INTEGER Count buffering overhead as bytes/2^tcp_adv_win_scale (if tcp_adv_win_scale > 0) or bytes-bytes/2^(-tcp_adv_win_scale), if it is <= 0. Possible values are [-31, 31], inclusive. Default: 2 tcp_allowed_congestion_control - STRING Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 37 EXTRAVERSION = -rc3 EXTRAVERSION = -rc4 NAME = Flesh-Eating Bats with Fangs # *DOCUMENTATION* Loading arch/arm/include/asm/hw_breakpoint.h +2 −2 Original line number Diff line number Diff line Loading @@ -20,7 +20,7 @@ struct arch_hw_breakpoint_ctrl { struct arch_hw_breakpoint { u32 address; u32 trigger; struct perf_event *suspended_wp; struct arch_hw_breakpoint_ctrl step_ctrl; struct arch_hw_breakpoint_ctrl ctrl; }; Loading arch/arm/kernel/entry-armv.S +4 −0 Original line number Diff line number Diff line Loading @@ -198,6 +198,7 @@ __dabt_svc: @ @ set desired IRQ state, then call main handler @ debug_entry r1 msr cpsr_c, r9 mov r2, sp bl do_DataAbort Loading Loading @@ -324,6 +325,7 @@ __pabt_svc: #else bl CPU_PABORT_HANDLER #endif debug_entry r1 msr cpsr_c, r9 @ Maybe enable interrupts mov r2, sp @ regs bl do_PrefetchAbort @ call abort handler Loading Loading @@ -439,6 +441,7 @@ __dabt_usr: @ @ IRQs on, then call the main handler @ debug_entry r1 enable_irq mov r2, sp adr lr, BSYM(ret_from_exception) Loading Loading @@ -703,6 +706,7 @@ __pabt_usr: #else bl CPU_PABORT_HANDLER #endif debug_entry r1 enable_irq @ Enable interrupts mov r2, sp @ regs bl do_PrefetchAbort @ call abort handler Loading Loading
Documentation/edac.txt +4 −4 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ csrow3. The representation of the above is reflected in the directory tree in EDAC's sysfs interface. Starting in directory /sys/devices/system/edac/mc each memory controller will be represented by its own 'mcX' directory, where 'X" is the index of the MC. by its own 'mcX' directory, where 'X' is the index of the MC. ..../edac/mc/ Loading @@ -207,7 +207,7 @@ by its own 'mcX' directory, where 'X" is the index of the MC. .... Under each 'mcX' directory each 'csrowX' is again represented by a 'csrowX', where 'X" is the csrow index: 'csrowX', where 'X' is the csrow index: .../mc/mc0/ Loading @@ -232,7 +232,7 @@ EDAC control and attribute files. In 'mcX' directories are EDAC control and attribute files for this 'X" instance of the memory controllers: this 'X' instance of the memory controllers: Counter reset control file: Loading Loading @@ -343,7 +343,7 @@ Sdram memory scrubbing rate: 'csrowX' DIRECTORIES In the 'csrowX' directories are EDAC control and attribute files for this 'X" instance of csrow: this 'X' instance of csrow: Total Uncorrectable Errors count attribute file: Loading
Documentation/networking/ip-sysctl.txt +1 −0 Original line number Diff line number Diff line Loading @@ -144,6 +144,7 @@ tcp_adv_win_scale - INTEGER Count buffering overhead as bytes/2^tcp_adv_win_scale (if tcp_adv_win_scale > 0) or bytes-bytes/2^(-tcp_adv_win_scale), if it is <= 0. Possible values are [-31, 31], inclusive. Default: 2 tcp_allowed_congestion_control - STRING Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 37 EXTRAVERSION = -rc3 EXTRAVERSION = -rc4 NAME = Flesh-Eating Bats with Fangs # *DOCUMENTATION* Loading
arch/arm/include/asm/hw_breakpoint.h +2 −2 Original line number Diff line number Diff line Loading @@ -20,7 +20,7 @@ struct arch_hw_breakpoint_ctrl { struct arch_hw_breakpoint { u32 address; u32 trigger; struct perf_event *suspended_wp; struct arch_hw_breakpoint_ctrl step_ctrl; struct arch_hw_breakpoint_ctrl ctrl; }; Loading
arch/arm/kernel/entry-armv.S +4 −0 Original line number Diff line number Diff line Loading @@ -198,6 +198,7 @@ __dabt_svc: @ @ set desired IRQ state, then call main handler @ debug_entry r1 msr cpsr_c, r9 mov r2, sp bl do_DataAbort Loading Loading @@ -324,6 +325,7 @@ __pabt_svc: #else bl CPU_PABORT_HANDLER #endif debug_entry r1 msr cpsr_c, r9 @ Maybe enable interrupts mov r2, sp @ regs bl do_PrefetchAbort @ call abort handler Loading Loading @@ -439,6 +441,7 @@ __dabt_usr: @ @ IRQs on, then call the main handler @ debug_entry r1 enable_irq mov r2, sp adr lr, BSYM(ret_from_exception) Loading Loading @@ -703,6 +706,7 @@ __pabt_usr: #else bl CPU_PABORT_HANDLER #endif debug_entry r1 enable_irq @ Enable interrupts mov r2, sp @ regs bl do_PrefetchAbort @ call abort handler Loading