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Commit 2f5ff012 authored by Matthias Brugger's avatar Matthias Brugger
Browse files

ARM: mediatek: dts: Add uart to mt6589



This patch adds the uart ports to the device tree of Mediatek mt6589 SoC.

Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 931ca3c5
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+38 −0
Original line number Diff line number Diff line
@@ -65,6 +65,12 @@
			clock-frequency = <32000>;
			#clock-cells = <0>;
		};

		uart_clk: dummy26m {
			compatible = "fixed-clock";
			clock-frequency = <26000000>;
			#clock-cells = <0>;
		};
	};

	soc {
@@ -100,5 +106,37 @@
			      <0x10214000 0x2000>,
			      <0x10216000 0x2000>;
		};

		uart0: serial@11006000 {
			compatible = "mediatek,mt6577-uart";
			reg = <0x11006000 0x400>;
			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		uart1: serial@11007000 {
			compatible = "mediatek,mt6577-uart";
			reg = <0x11007000 0x400>;
			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		uart2: serial@11008000 {
			compatible = "mediatek,mt6577-uart";
			reg = <0x11008000 0x400>;
			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
			clocks = <&uart_clk>;
			status = "disabled";
		};

		uart3: serial@11009000 {
			compatible = "mediatek,mt6577-uart";
			reg = <0x11009000 0x400>;
			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
			clocks = <&uart_clk>;
			status = "disabled";
		};
	};
};