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Commit 2d6f5f0c authored by Vishnu Patekar's avatar Vishnu Patekar Committed by Maxime Ripard
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clk: sunxi: Add apb0 gates for A83T 



APB0 is part of PRCM, and is compatible with earlier SOCs.
apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks.
This patch adds support for APB0 gates for A83T.

Signed-off-by: default avatarVishnu Patekar <vishnupatekar0510@gmail.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent 8f2bf2ad

Documentation/devicetree/bindings/clock/sunxi.txt

+1 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ Required properties: 
	"allwinner,sun6i-a31-apb0-clk" - for the APB0 clock on A31

	"allwinner,sun8i-a23-apb0-clk" - for the APB0 clock on A23

	"allwinner,sun9i-a80-apb0-clk" - for the APB0 bus clock on A80

	"allwinner,sun8i-a83t-apb0-gates-clk" - for the APB0 gates on A83T

	"allwinner,sun4i-a10-apb0-gates-clk" - for the APB0 gates on A10

	"allwinner,sun5i-a13-apb0-gates-clk" - for the APB0 gates on A13

	"allwinner,sun5i-a10s-apb0-gates-clk" - for the APB0 gates on A10s

drivers/clk/sunxi/clk-simple-gates.c

+2 −0
Original line number Diff line number Diff line
@@ -130,6 +130,8 @@ CLK_OF_DECLARE(sun8i_a23_apb2, "allwinner,sun8i-a23-apb2-gates-clk", 
	       sunxi_simple_gates_init);

CLK_OF_DECLARE(sun8i_a33_ahb1, "allwinner,sun8i-a33-ahb1-gates-clk",

	       sunxi_simple_gates_init);

CLK_OF_DECLARE(sun8i_a83t_apb0, "allwinner,sun8i-a83t-apb0-gates-clk",

	       sunxi_simple_gates_init);

CLK_OF_DECLARE(sun9i_a80_ahb0, "allwinner,sun9i-a80-ahb0-gates-clk",

	       sunxi_simple_gates_init);

CLK_OF_DECLARE(sun9i_a80_ahb1, "allwinner,sun9i-a80-ahb1-gates-clk",