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Commit 2d6cc729 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/radeon: use async dma for ttm buffer moves on 6xx-SI 



Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 009ee7a0

drivers/gpu/drm/radeon/radeon_asic.c

+18 −18
Original line number Diff line number Diff line
@@ -974,8 +974,8 @@ static struct radeon_asic r600_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r600_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1058,8 +1058,8 @@ static struct radeon_asic rs780_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r600_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1142,8 +1142,8 @@ static struct radeon_asic rv770_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &r600_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &r600_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1226,8 +1226,8 @@ static struct radeon_asic evergreen_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &evergreen_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &evergreen_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1310,8 +1310,8 @@ static struct radeon_asic sumo_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &evergreen_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &evergreen_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1394,8 +1394,8 @@ static struct radeon_asic btc_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &evergreen_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &evergreen_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1519,8 +1519,8 @@ static struct radeon_asic cayman_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &evergreen_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &evergreen_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1644,8 +1644,8 @@ static struct radeon_asic trinity_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &evergreen_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = &r600_copy_blit,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &evergreen_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,
@@ -1769,8 +1769,8 @@ static struct radeon_asic si_asic = { 
		.blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.dma = &si_copy_dma,

		.dma_ring_index = R600_RING_TYPE_DMA_INDEX,

		.copy = NULL,

		.copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,

		.copy = &si_copy_dma,

		.copy_ring_index = R600_RING_TYPE_DMA_INDEX,

	},

	.surface = {

		.set_reg = r600_set_surface_reg,